Expose the SDK options for binary stripping to the menuconfig. This
way, packages can easily be built with debug symbols using the SDK.
Signed-off-by: David Bauer <mail@david-bauer.net>
(cherry picked from commit bb817bb4b8)
Add missing define for dwc quirk patch required to fix compilation error
for layerscape target. This was wrongly dropped in a kernel bump.
Fixes: 8e5de89769 ("kernel: bump 5.4 to 5.4.213")
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
This fixes:
[ 10.440495] bcm_ns_usb2 1800c000.usb2-phy: can't request region for resource [mem 0x1800c000-0x1800cfff]
[ 10.450039] bcm_ns_usb2 1800c000.usb2-phy: Failed to map DMU regs
[ 10.456183] bcm_ns_usb2: probe of 1800c000.usb2-phy failed with error -16
caused by conflict in allocating resources.
Fixes: 44ce70f0e2 ("bcm53xx: drop downstream patch that now breaks pinctrl driver")
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
(cherry picked from commit 1d7c1a4198)
This includes:
1. BCM5301X changes from 5.14 and queued 5.15 stuff
2. NSP changes from 5.11 - 5.15 for kernel 5.10
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
(cherry picked from commit bce00f47e5)
The most affecting change is move of files from bcm4908/ to the bcmbca/.
That required updating few paths.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
(cherry picked from commit 45ac906c64)
1. Include Linux DTB
2. Add 50991 variant (seems to differ by 1 PHY we don't support yet)
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
(cherry picked from commit b8f8c6f2dd)
Add the missing LEDs for GB-PC2. Some of these LEDs don't exist on the
device schematics. Tests on a GB-PC2 by me and Petr proved otherwise.
Remove ethblack-green and ethblue-green LEDs for GB-PC1. They are not wired
to GPIO 3 or 4 and the wiring is currently unknown.
Set ethyellow-orange to display link state and activity of the ethyellow
interface for GB-PC2.
Link: https://github.com/ngiger/GnuBee_Docs/blob/master/GB-PCx/Documents/GB-PC2_V1.1_schematic.pdf
Tested-by: Petr Louda <petr.louda@outlook.cz>
Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
(cherry picked from commit 2a6ef7f53d)
Change switch port labels to ethblack & ethblue.
Change lan1 & lan2 LEDs to ethblack_act & ethblue_act and fix GPIO pins.
Add the external phy with ethyellow label on the GB-PC2 devicetree.
Do not claim rgmii2 as gpio, it's used for ethernet with rgmii2 function.
Enable ICPlus PHY driver for IP1001 which GB-PC2 has got.
Update interface name and change netdev function.
Enable lzma compression to make up for the increased size of the kernel.
Make spi flash bindings on par with mainline Linux to fix read errors.
Tested on GB-PC2 by Petr.
Tested-by: Petr Louda <petr.louda@outlook.cz>
Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
(cherry picked from commit 4807bd6a00)
Adjust them according to OEM firmware.
Fixes: e24635710c (" ipq40xx: add support for Luma Home WRTQ-329ACN")
Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
When building the mediatek/mt7629 target in OpenWrt 22.03 the kernel
does not have a configuration option for CONFIG_CRYPTO_DEV_MEDIATEK. Add
this option to the generic kernel configuration and also add two other
configuration options which are removed when we refresh the mt7629
kernel configuration.
Fixes: 2bea35cb55 ("mediatek: remove crypto-hw-mtk package")
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
(cherry picked from commit dcc0fe24ea)
(cherry picked from commit bfd070e7fa)
Add 6.1 tag to upstream patch now that 6.1 got tagged. This permits to
track patch in a better way and directly drop them on kernel bump.
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
(cherry picked from commit 802ca492d8)
This patch is needed to handle interrupts by the second VPE on the Lantiq
ARX100, xRX200, xRX300 and xRX330 SoCs. Switching some ICU interrupts to
the second VPE results in a hang. Currently, the vsmp_init_secondary()
function is responsible for enabling these interrupts. It only enables
Malta-specific interrupts (SW0, SW1, HW4 and HW5).
The MIPS core has 8 interrupts defined. On Lantiq SoCs, hardware
interrupts are wired to an ICU instance. Each VPE has an independent
instance of the ICU. The mapping of the ICU interrupts is shown below:
SW0(IP0) - IPI call,
SW1(IP1) - IPI resched,
HW0(IP2) - ICU 0-31,
HW1(IP3) - ICU 32-63,
HW2(IP4) - ICU 64-95,
HW3(IP5) - ICU 96-127,
HW4(IP6) - ICU 128-159,
HW5(IP7) - timer.
This patch enables all interrupt lines on the second VPE.
This problem affects multithreaded SoCs with a custom interrupt controller.
SOCs with 1004Kc core and newer use the MIPS GIC. At this point, I am aware
that the Realtek RTL839x and RTL930x SoCs may need a similar fix. In the
future, this may be replaced with some generic solution.
Tested on Lantiq xRX200.
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
(cherry picked from commit fbd33d6164)
This change helps BCM4908 SoC. It was capable of 940 Mb/s masq NAT while
using iperf but users reported lower & unstable speeds for HTTP based
tests.
For LibreSpeed tests this bumps NAT speed from ~930 Mb/s to ~990 Mb/s
(not that this value seems real but speed bump definitely is).
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
This should slightly improve performance thanks to the better cache
usage.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
(cherry picked from commit 6a02205a4d)
This gets rid of "nvmem-cells" limitation. Dynamic partitions can be
defined for any (sub)partitions layout.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
(cherry picked from commit 4eda414b09)
Fixes build warnings when using newer versions of grep.
Signed-off-by: Chris Osgood <chris_github@functionalfuture.com>
Tested-by: Georgi Valkov <gvalkov@gmail.com>
(cherry picked from commit c5e167e0d6)
[ fix conflict error ]
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Fixes following missing kernel config symbol after adding GPIO watchdog:
Software watchdog (SOFT_WATCHDOG) [M/n/y/?] m
Watchdog device controlled through GPIO-line (GPIO_WATCHDOG) [Y/n/m/?] y
Register the watchdog as early as possible (GPIO_WATCHDOG_ARCH_INITCALL) [N/y/?] (NEW)
Fixes: 1a97c03d86 ("rampis: feed zbt-we1026 external watchdog")
Signed-off-by: Petr Štetiar <ynezz@true.cz>
(cherry picked from commit fb2801b82c)
[adapted to config-5.4]
Signed-off-by: Federico Capoano <f.capoano@openwisp.io>
Without feeding the gpio watchdog, the board will reset after 90 seconds
Signed-off-by: Arvid E. Picciani <aep@exys.org>
(cherry picked from commit 1a97c03d86)
[adapted to config-5.4]
Signed-off-by: Federico Capoano <f.capoano@openwisp.io>
Broadcom's U-Boot contains environment data blocks. They need to be
found (offsets aren't predefined) to access env variables.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
(cherry picked from commit 137149847d)
Backport upstream solution that permits to declare nvmem cells with
dynamic partition defined by special parser.
This provide an OF node for NVMEM and connect it to the defined dynamic
partition.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
(cherry picked from commit 1a9ee36734)
This fixes:
[ 0.292536] ns-pinmux 1800c100.cru:pinctrl: invalid resource
[ 0.298322] ns-pinmux 1800c100.cru:pinctrl: Failed to map pinctrl regs
[ 0.305578] ns-pinmux: probe of 1800c100.cru:pinctrl failed with error -22
Linux 5.4.157 included commit 6d0b30784fcd9 ("Revert "pinctrl: bcm: ns:
support updated DT binding as syscon subnode"") which makes pinctrl
driver expect the old DT syntax.
Drop downstream patch switching pinctrl node to the invalidated syntax.
Fixes: 0b7311300b ("kernel: bump 5.4 to 5.4.158")
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
In theory we could have just 1 bootfs image for all devices as each
device has its own entry in the "configurations" node. It doesn't work
well with default configuration though.
If something goes wrong U-Boot SPL can be interrupted (by pressing A) to
enter its minimalistic menu. It allows ignoring boardid. In such case
bootfs default configuration is used.
For above reason each SoC family (BCM4908, BCM4912) should have its own
bootfs built. It allows each of them to have working default
configuration.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
(cherry picked from commit 6ae2f7ff47)
The MikroTik mAP-2nd (sold as mAP) is an indoor 2.4Ghz AP with
802.3af/at PoE input and passive PoE passthrough.
See https://mikrotik.com/product/RBmAP2nD for more details.
Specifications:
- SoC: QCA9533
- RAM: 64MB
- Storage: 16MB NOR
- Wireless: QCA9533 802.11b/g/n 2x2
- Ethernet: 2x 10/100 ports,
802.3af/at PoE in port 1, 500 mA passive PoE out on port 2
- 7 user-controllable LEDs
Note: the device is a tiny AP and does not distinguish between both
ethernet ports roles, so they are both assigned to lan.
With the current setup, ETH1 is connected to eth1 and ETH2 is connected
to eth0 via the embedded switch port 2.
Flashing:
TFTP boot initramfs image and then perform sysupgrade. The "ETH1" port
must be used to upload the TFTP image. Follow common MikroTik procedure
as in https://openwrt.org/toh/mikrotik/common.
Tested-By: Andrew Powers-Holmes <aholmes@omnom.net>
Signed-off-by: Thibaut VARÈNE <hacks@slashdirt.org>
(cherry picked from commit e1223dbee3)
The MikroTik RB952Ui-5ac2nD (sold as hAP ac lite) is an indoor 2.4Ghz
and 5GHz AP/router with a 2 dBi integrated antenna.
See https://mikrotik.com/product/RB952Ui-5ac2nD for more details.
Specifications:
- SoC: QCA9533
- RAM: 64MB
- Storage: 16MB NOR
- Wireless: QCA9533 802.11b/g/n 2x2 / QCA9887 802.11a/n/ac 2x2
- Ethernet: AR934X switch, 5x 10/100 ports,
10-28 V passive PoE in port 1, 500 mA PoE out on port 5
- 6 user-controllable LEDs:
- 1x user (green)
- 5x port status (green)
Flashing:
TFTP boot initramfs image and then perform sysupgrade. The "Internet"
port (port number 1) must be used to upload the TFTP image, then
connect to any other port to access the OpenWRT system.
Follow common MikroTik procedure as in
https://openwrt.org/toh/mikrotik/common.
Signed-off-by: Thibaut VARÈNE <hacks@slashdirt.org>
(cherry picked from commit 2bd33e8626)
This makes the WAN interface and port appear in
LuCi -> Network -> Switch on Linksys MR8300.
This allows to configure a VLAN on WAN.
Fixes: FS#4227
Signed-off-by: Julien Cassette <julien.cassette@gmail.com>
(cherry picked from commit 2c1f8a665e)
There are two versions which are identical apart from the enclosure:
YunCore AX820: indoor ceiling mount AP with integrated antennas
YunCore HWAP-AX820: outdoor enclosure with external (N) connectors
Hardware specs:
SoC: MediaTek MT7621DAT
Flash: 16 MiB SPI NOR
RAM: 128MiB (DDR3, integrated)
WiFi: MT7905DAN+MT7975DN 2.4/5GHz 2T2R 802.11ax
Ethernet: 10/100/1000 Mbps x2 (WAN/PoE+LAN)
LED: Status (green)
Button: Reset
Power: 802.11af/at PoE; DC 12V,1A
Antennas: AX820(indoor): 4dBi internal; HWAP-AX820(outdoor): external
Flash instructions:
The "OpenWRT support" version of the AX820 comes with a LEDE-based
firmware with proprietary MTK drivers and a luci webinterface and
ssh accessible under 192.168.1.1 on LAN; user root, no password.
The sysupgrade.bin can be flashed using luci or sysupgrade via ssh,
you will have to force the upgrade due to a different factory name.
Remember: Do *not* preserve factory configuration!
MAC addresses as used by OEM firmware:
use address source
2g 44:D1:FA:*:0b Factory 0x0004 (label)
5g 46:D1:FA:*:0b LAA of 2g
lan 44:D1:FA:*:0c Factory 0xe000
wan 44:D1:FA:*:0d Factory 0xe000 + 1
The wan MAC can also be found in 0xe006 but is not used by OEM dtb.
Due to different MAC handling in mt76 the LAA derived from lan is used
for 2g to prevent duplicate MACs when creating multiple interfaces.
Signed-off-by: Clemens Hopfer <openwrt@wireloss.net>
(cherry picked from commit 4891b86538)
[switch to mtd-mac-address instead of nvmem-cells]
CPU: Allwinner V40 quad-core Cortex A7 @ 1.2GHz
Memory: 1GB DDR3
Storage: SDcard, native SATA
Network: 10/100/1000M ethernet, Ampak AP6212 wifi + BT
USB: 4x USB 2.0
Installation:
Use the standard sunxi installation to an SD-card.
While the board is very similar to the M2 Ultra board
(the V40 is the automotive version of the R40), as both
the u-boot and kernel supports them separately, and some
pins are different, let's add a separate device spec.
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
(cherry picked from commit 9aa66b8ce7)
Sitecom WLR-4100 v1 002 (marked as X4 N300) is a wireless router
Specification:
SoC: MT7620A
RAM: 64 MB DDR2
Flash: MX25L6405D SPI NOR 8 MB
WIFI: 2.4 GHz integrated
Ethernet: 5x 10/100/1000 Mbps QCA8337
USB: 1x 2.0
LEDS: 2x GPIO controlled, 5x switch
Buttons: 1x GPIO controlled
UART: row of 4 unpopulated holes near USB port, starting count from
white triangle on PCB:
VCC 3.3V
GND
TX
RX
baud: 115200, parity: none, flow control: none
Installation
Connect to one of LAN (yellow) ethernet ports,
Open router configuration interface,
Go to Toolbox > Firmware,
Browse for OpenWrt factory image with dlf extension and hit Apply,
Wait few minutes, after the Power LED will stop blinking, the router is
ready for configuration.
Known issues
Some USB 2.0 devices work at full speed mode 1.1 only
MAC addresses
factory partition only contains one (binary) MAC address in 0x4.
u-boot-env contains four (ascii) MAC addresses, of which two appear
to be valid.
factory 0x4 **:**:**:**:b9:84 binary
u-boot-env ethaddr **:**:**:**:b9:84 ascii
u-boot-env wanaddr **:**:**:**:b9:85 ascii
u-boot-env wlanaddr 00:AA:BB:CC:DD:12 ascii
u-boot-env iNICaddr 00:AA:BB:CC:DD:22 ascii
The factory firmware only assigns ethaddr. Thus, we take the
binary value which we can use directly in DTS.
Additional information
OEM firmware shell password is: SitecomSenao
useful for creating backup of original firmware.
There is also another revision of this device (v1 001), based on RT3352 SoC
The nvmem feature (commit 06bb4a5) was introduced in master after the
splitting of the 21.02 branch. It need to be reverted in 21.02..
Signed-off-by: Andrea Poletti <polex73@yahoo.it>
[remove config DT label, convert to nvmem, remove MAC address
setup from u-boot-env, add MAC address info to commit message]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
(cherry picked from commit de0c380a5f)
Signed-off-by: Petr Štetiar <ynezz@true.cz>
Using the BOARD_NAME variable results for both er and erlite devices to
identify themselfs as `er` and `erlite` (via `ubus call system board`).
This is problematic when devices search for firmware upgrades since the
OpenWrt profile is actually called `ubnt_edgerouter` and
`ubnt_edgerouter-lite`.
By adding the `SUPPORTED_DEVICE` a mapping is created to point devices
called `er` or `erlite` to the corresponding profile.
FIXES: https://github.com/openwrt/asu/issues/348
Signed-off-by: Paul Spooren <mail@aparcar.org>
(cherry picked from commit 2a07270180)
The order of LAN ports shown in Luci is reversed compared to what is
written on the case of the device. Fix the order so that they match.
Fixes: #10275
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
(cherry picked from commit 69ea671320)
moves and extends the current facilities, which have been
added some time ago for the the usbip utility, to support
more utilites that are shipped with the Linux kernel tree
to the SDK.
this allows to drop all the hand-waving and code for
failed previous attempts to mitigate the SDK build failures.
Fixes: bdaaf66e28 ("utils/spidev_test: build package directly from Linux")
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
(cherry picked from commit b479db9062)
(cherry picked from commit eb8d0da88a0dcf7f10f05ad10c48e3a691f5a8d1)
The MediaTek's Crypto Engine driver has been replaced with the upstream
Inside Secure's SafeXcel cryptographic engine driver, however kconfig
has not been changed accordingly, this commit fixes it.
Fixes: 127ad76 ("mediatek: switch over to extended upstream eip97
driver")
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
The MediaTek's Crypto Engine module is only available for mt7623, in
which case it is built into the kernel.
Signed-off-by: Eneas U de Queiroz <cotequeiroz@gmail.com>
(cherry picked from commit 3f2d0703b6)
This improves NAT masquarade network performance.
An alternative to kernel change would be runtime setup but that requires
ethtool and identifying relevant network interface and all related
switch ports interfaces.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
(cherry picked from commit 82d0dd8f8a)
1. KCFLAGS should be used for custom flags
2. Optimization flags are arch / SoC specific
3. -fno-reorder-blocks may *worsen* network performace on some SoCs
4. Usage of flags was *reversed* since 5.4 and noone reported that
If we really need custom flags then CONFIG_KERNEL_CFLAGS should get
default value adjusted properly (per target).
Ref: 4e0c54bc5b ("kernel: add support for kernel 5.4")
Link: http://lists.openwrt.org/pipermail/openwrt-devel/2022-June/038853.html
Link: https://patchwork.ozlabs.org/project/openwrt/patch/20190409093046.13401-1-zajec5@gmail.com/
Cc: Felix Fietkau <nbd@nbd.name>
Cc: Hauke Mehrtens <hauke@hauke-m.de>
Cc: Rui Salvaterra <rsalvaterra@gmail.com>
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
(cherry picked from commit 22168ae681)
This uses kernel's generic variable and doesn't require patching it with
a custom Makefile change. It's expected *not* to change any behaviour.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
(cherry picked from commit 1d42af720c)
Signed-off-by: Kevin Darbyshire-Bryant <ldir@darbyshire-bryant.me.uk>
(cherry picked from commit 24e27bec9a)
Delete the crypto-lib-blake2s kmod package, as BLAKE2s is now built-in.
Fixes: be0639063a ("kernel: bump 5.4 to 5.4.203")
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This patch was backported to kernel 5.4.200, but without the wireguard
change, because wireguard is not available in upstream kernel 5.4.
This adds the missing changes for wireguard too.
Fixes: be0639063a ("kernel: bump 5.4 to 5.4.203")
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Since kernel 5.5-rc1 [1], there are upstreamed DTS files related to ESPRESSObin
variants. Move these to files-5.4.
This helps if you want to use a newer kernel version than used
in OpenWrt 21.02 (= LTS kernel 5.4), you would end up with duplicate files
(one outdated, one up to date from newer Linux versions).
Fixes:
Error: arch/arm64/boot/dts/marvell/armada-3720-espressobin-v7.dts:19.1-7:
Label or path ports not found
FATAL ERROR: Syntax error parsing input tree
[1] 447b878935
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
(cherry picked from commit 7be8ab4f7b)
Signed-off-by: Josef Schlehofer <pepe.schlehofer@gmail.com>
[reword commit subject and commit description]
Flow offload dst can become invalid after the route cache is created.
dst_check() in packet path is necessary to prevent packet drop.
Signed-off-by: Ritaro Takenaka <ritarot634@gmail.com>
This fixes a well known "LZMA ERROR 1" error, reported previously on
numerous of other devices from 'ramips' target.
Fixes: #9842Fixes: #8964
Reported-by: Juergen Hench <jurgen.hench@gmail.com>
Tested-by: Juergen Hench <jurgen.hench@gmail.com>
Signed-off-by: Demetris Ierokipides <ierokipides.dem@gmail.com>
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
(cherry picked from commit fd72e595c2)
Both buttons on the RT-AC57U are active-low. Fix the GPIO flag for the
WPS cutton to fix button behavior.
Signed-off-by: David Bauer <mail@david-bauer.net>
(cherry picked from commit 535b0c70b1)
The 2.4GHz interface doesn't come up properly with the log showing:
mt7621-pci 1e140000.pcie: pcie1 no card, disable it (RST & CLK)
As seen on other MT7621 boards this is caused by a missing reset GPIO.
The MT7621 dtsi set GPIO 19 as PCIe reset GPIO, which on this board
reset the 5GHz interface on port 0. Add GPIO 8 to the PCIe reset GPIO
list to also reset the 2.4GHz interface on port 1.
Signed-off-by: Alban Bedel <albeu@free.fr>
(cherry picked from commit f953a1a4bf)
This commit is completely based on the work of adron-s:
https://github.com/openwrt/openwrt/pull/4721#issuecomment-1101108651
The commit fixes the data corruption on TX packets. Packets are
transmitted, but their contents are replaced with zeros. This error is
caused by the lack of guard (50 ms) intervals between calibration phases.
This error is treated by adding mdelay(50) to the calibration function
code. In the original qca-ssda code [0], these mdelays were existing, but
in the ar41xx.c they are gone.
Tested on:
- Fritz!Box 4040
- Fritz!Box 7530
- Mikrotik SXTsq 5AC
- ZyXEL NBG6617
- [0] https://git.codelinaro.org/clo/qsdk/oss/lklm/qca-ssdk/-/blob/NHSS.QSDK.11.4/src/init/ssdk_init.c#L2072
Suggested-by: Serhii Serhieiev <adron@mstnt.com>
Reviewed-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Nick Hainke <vincent@systemli.org>
(cherry picked from commit ab7e53e5cc)
[Deleted 5.10 from commit title]
Signed-off-by: Nick Hainke <vincent@systemli.org>
MPLS feature symbols are normally only set when kmod-mpls is enabled, but the
CONFIG_MPLS symbol they depend on could also have been selected by openvswitch
instead
Signed-off-by: Felix Fietkau <nbd@nbd.name>
(cherry-picked from commit 92add80414)
These boards have AR8327 or QCA8337 external ethernet switch.
The SOC also has it's own internal switch
where VLAN is now enabled by default.
Changes to preinit caused all switches to have VLANs enabled by default
even if they are not configured with a topology in uci_defaults
(see commit f017f617ae)
When both internal and external switches have VLANs,
and the external switch has both LAN and WAN,
the TX traffic from the SOC cannot flow to the tagged port on the external switch
because the VLAN IDs are not matching.
So disable the internal switch VLANs by default on these boards.
Also, add a topology for the internal switch,
so that on LuCI there is not an "unknown topology" warning.
In theory, it may be possible to have LAN ports on both switches
through internal and external PHYs, but there are no known boards that have this.
Signed-off-by: Michael Pratt <mcpratt@pm.me>
(cherry picked from commit 2adeada045)
Define and use some missing macros,
and use them instead of BIT() or numbers for more readable code.
Add comment for a bit change that seems unrelated to ethernet
but is actually needed (PCIe Root Complex mode).
Remove unknown and unused macro RST_CTRL_MCM
(probably from MT7621 / MT7622)
This is the last of a series of fixes, so bump version.
Signed-off-by: Michael Pratt <mcpratt@pm.me>
(cherry picked from commit 88a0cebadf)
the register bits for TX delay and RX delay are opposites:
when TX delay bit is set, delay is enabled
when RX delay bit is set, delay is disabled
So, when both bits are unset, it is RX delay
and when both bits are set, it is TX delay
Note: TXID is the default RGMII mode of the SOC
Fixes: 5410a8e295 ("ramips: mt7620: add rgmii delays support")
Signed-off-by: Michael Pratt <mcpratt@pm.me>
(cherry picked from commit 26c84b2e46)
Add back the register write to disable internal PHYs
as a separate option in the code that can be set using a DTS property.
Set the option to true by default
when an external mt7530 switch is identified.
This makes the driver more in sync with original SDK code
while keeping the lines separated into different options
to accommodate any board with any PHY layout.
Signed-off-by: Michael Pratt <mcpratt@pm.me>
(cherry picked from commit cc6fd6fbb5)
The function mt7620_mdio_mode is only called once
and both the function and mdio_mode block have been named incorrectly,
leading to confusion and useless commits.
These lines in the mdio_mode block of mt7620_hw_init
are only intended for boards with an external mt7530 switch.
(see commit 194ca6127e)
Therefore, move lines from mdio_mode to the place in soc_mt7620.c
where the type of mt7530 switch is identified,
and move lines from mt7620_mdio_mode to a main function.
mt7620_mdio_mode was called from mt7620_gsw_init
where the priv struct is available,
so the lines must stay in mt7620_gsw_init function.
In order to keep things as simple as possible,
keep the DTS property related function calls together,
by moving them from mt7620_gsw_probe to init.
Remove the now useless DTS properties and extra phy nodes.
Fixes: 5a6229a93d ("ramips: remove superfluous & confusing DT binding")
Fixes: b85fe43ec8 ("ramips: mt7620: add force use of mdio-mode")
Signed-off-by: Michael Pratt <mcpratt@pm.me>
(cherry picked from commit 6972e498d3)
Set the PHY base address to 12 for mt7530 and 8 for others,
which is based on the default setting for some devices
from printing the register with the following command
after it is written to by uboot during the boot cycle.
`md 0x10117014 1`
PHY_BASE option only uses 5 bits of the register,
bits 16 to 20, so use 8-bit integer type.
Set the option using the DTS property mediatek,ephy-base
and create the gsw node if missing.
Also, added a kernel message to display the EPHY base address.
Note:
If anything is written to a PHY address that is greater than 1 hex char (greater than 0xf)
then there is adverse effects with Atheros switches.
Signed-off-by: Michael Pratt <mcpratt@pm.me>
(cherry picked from commit 0976b6c426)
When the new variable ephy_base was introduced,
it was not applied to the if block for mdio_mode.
The first line in the mdio_mode if block
sets the EPHY base address to 12 in the SOC by writing a register,
but the corresponding variable in the driver
was still set to the default of 0.
This causes subsequent lines that write registers with the function
_mt7620_mii_write
to write to PHY addresses 0 through 4
while internal PHYs have been moved to addresses 12 through 16.
All of these lines are intended only for PHYs on the SOC internal switch,
however, they are being written to external ethernet switches
if they exist at those PHY addresses 0 through 4.
This causes some ethernet ports to be broken on boards with AR8327 or QCA8337 switch.
Other suggested fixes move those lines to the else block of mdio_mode,
but removing the else block completely also fixes it.
Therefore, move the lines to the mt7620_hw_init function main block,
and have only one instance of the function mtk_switch_w32
for writing the register with the EPHY base address.
In theory, this also allows for boards that have both external switches
and internal PHYs that lead to ethernet ports to be supported.
Fixes: 391df37829 ("ramips: mt7620: add EPHY base mdio address changing possibility")
Signed-off-by: Michael Pratt <mcpratt@pm.me>
(cherry picked from commit de5394a29d)
A workaround was added to the switch driver
to set SOC port 4 as an RGMII GMAC interface
based on the DTS property mediatek,port4-gmac.
(previously mediatek,port4)
However, the ethernet driver already does this,
but is being blocked by a return statement
whenever the phy-handle and fixed-link properties
are both missing from nodes that define the port properties.
Revert the workaround, so that both the switch driver
and ethernet driver are not doing the same thing
and move the phy-handle related lines down
so nothing is ending the function prematurely.
While at it, clean up kernel messages
and delete useless return statements.
Fixes: f6d81e2fa1 ("mt7620: gsw: make IntPHY and ExtPHY share mdio addr 4 possible")
Signed-off-by: Michael Pratt <mcpratt@pm.me>
(cherry picked from commit afd60d650e)
These nodes are used for configuring a GMAC interface
and for defining external PHYs to be accessed with MDIO.
None of this is possible on MT7620N, only MT7620A,
so remove them from all MT7620N DTS.
When the mdio-bus node is missing, the driver returns -NODEV
which causes the internal switch to not initialize.
Replace that return so that everything works without the DTS node.
Also, an extra kernel message to indicate for all error conditions
that mdio-bus is disabled.
Fixes: d482356322 ("ramips: mt7620n: add mdio node and disable port4 by default")
Fixes: aa5014dd1a ("ramips: mt7620n: enable port 4 as EPHY by default")
Signed-off-by: Michael Pratt <mcpratt@pm.me>
(cherry picked from commit a2acdf9607)
There are only 2 options in the driver
for the function of mt7620 internal switch port 4:
EPHY mode (RJ-45, internal PHY)
GMAC mode (RGMII, external PHY)
Let the DTS property be boolean instead of string
where EPHY mode is the default.
Fix how the properties are written
for all DTS that use them,
and add missing nodes where applicable,
and remove useless nodes,
and minor DTS formatting.
Signed-off-by: Michael Pratt <mcpratt@pm.me>
(cherry picked from commit 953bfe2eb3)
This enables autonegotiation for all ephy ports on probe.
Some devices do not configure the ports, particularly port 4.
Signed-off-by: Gaspare Bruno <gaspare@anlix.io>
[replace magic values ; reword commit message]
Signed-off-by: David Bauer <mail@david-bauer.net>
(cherry picked from commit 0056ffb468)
The basic mode control register of the ESW PHYs is modified in this
codeblock. Use the respective macros to make this code more readable.
Signed-off-by: David Bauer <mail@david-bauer.net>
(cherry picked from commit 6a15abbc75)
David Bauer
Adrian Schmutzler