Instead of assuming /sbin contains the correct BusyBox symlinks, directly invoke
the busybox executable. The required utilities are guaranteed to be present,
since the zram-swap package selects them. Additionally, don't assume busybox
resides in /bin, rely on PATH to find it.
While at it, update the copyright year, use SPDX and switch to AUTORELEASE.
Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
With the default configuration we generate, the supplicant starts
scanning and tries to connect to any open network when the interface
is enabled.
In some cases it can be desirable to prevent the supplicant from
scanning by itself. For example, if on the same radio an AP is
configured and an unconfigured STA is added (to be configured with
WPS), the AP might not be able to beacon until the STA stops
scanning.
In such a case, the STA configuration can still be required to set
specific settings (e.g. multi_ap_backhaul_sta) so it can't be set to
"disabled" in uci (because that would prevent the supplicant from
being run at all). The alternative is to add the "disabled" parameter
to the default network block in the supplicant configuration.
This patch adds a "default_disabled" setting in UCI which, when set,
adds the "disabled" parameter to the supplicant default network block.
Signed-off-by: Raphaël Mélotte <raphael.melotte@mind.be>
The system init script currently sets /tmp/localinfo when zoneinfo is
populated. However, zoneinfo has spaces in it whereas the actual files
have _ instead of spaces. This made the if condition never return true.
Example failure when removing the if condition:
/tmp/localtime -> /usr/share/zoneinfo/America/Los Angeles
This file does not exist. America/Los_Angeles does.
Ran through shfmt -w -ci -bn -sr -s
Signed-off-by: Rosen Penev <rosenp@gmail.com>
In the new kernel version 5.X,reboot will fail.
When SOC is reset, flash has not exited the 4-byte address mode,
which causes the operation mode mismatch of flash during boot.Add
broken-flash-reset to make flash exit 4-byte address mode before
SOC reset
Signed-off-by: Liu Yu <f78fk@live.com>
Without this definition ethernet led can work as usual, but it's better to
re-add it. Relying on default values may cause uncontrollable factors.
Fixes: 882a6116d3 ("ramips: improve pinctrl for Youku YK-L1")
Signed-off-by: Shiji Yang <yangshiji66@qq.com>
These boards have AR8327 or QCA8337 external ethernet switch.
The SOC also has it's own internal switch
where VLAN is now enabled by default.
Changes to preinit caused all switches to have VLANs enabled by default
even if they are not configured with a topology in uci_defaults
(see commit f017f617ae)
When both internal and external switches have VLANs,
and the external switch has both LAN and WAN,
the TX traffic from the SOC cannot flow to the tagged port on the external switch
because the VLAN IDs are not matching.
So disable the internal switch VLANs by default on these boards.
Also, add a topology for the internal switch,
so that on LuCI there is not an "unknown topology" warning.
In theory, it may be possible to have LAN ports on both switches
through internal and external PHYs, but there are no known boards that have this.
Signed-off-by: Michael Pratt <mcpratt@pm.me>
Define and use some missing macros,
and use them instead of BIT() or numbers for more readable code.
Add comment for a bit change that seems unrelated to ethernet
but is actually needed (PCIe Root Complex mode).
Remove unknown and unused macro RST_CTRL_MCM
(probably from MT7621 / MT7622)
This is the last of a series of fixes, so bump version.
Signed-off-by: Michael Pratt <mcpratt@pm.me>
the register bits for TX delay and RX delay are opposites:
when TX delay bit is set, delay is enabled
when RX delay bit is set, delay is disabled
So, when both bits are unset, it is RX delay
and when both bits are set, it is TX delay
Note: TXID is the default RGMII mode of the SOC
Fixes: 5410a8e295 ("ramips: mt7620: add rgmii delays support")
Signed-off-by: Michael Pratt <mcpratt@pm.me>
Add back the register write to disable internal PHYs
as a separate option in the code that can be set using a DTS property.
Set the option to true by default
when an external mt7530 switch is identified.
This makes the driver more in sync with original SDK code
while keeping the lines separated into different options
to accommodate any board with any PHY layout.
Signed-off-by: Michael Pratt <mcpratt@pm.me>
The function mt7620_mdio_mode is only called once
and both the function and mdio_mode block have been named incorrectly,
leading to confusion and useless commits.
These lines in the mdio_mode block of mt7620_hw_init
are only intended for boards with an external mt7530 switch.
(see commit 194ca6127e)
Therefore, move lines from mdio_mode to the place in soc_mt7620.c
where the type of mt7530 switch is identified,
and move lines from mt7620_mdio_mode to a main function.
mt7620_mdio_mode was called from mt7620_gsw_init
where the priv struct is available,
so the lines must stay in mt7620_gsw_init function.
In order to keep things as simple as possible,
keep the DTS property related function calls together,
by moving them from mt7620_gsw_probe to init.
Remove the now useless DTS properties and extra phy nodes.
Fixes: 5a6229a93d ("ramips: remove superfluous & confusing DT binding")
Fixes: b85fe43ec8 ("ramips: mt7620: add force use of mdio-mode")
Signed-off-by: Michael Pratt <mcpratt@pm.me>
Set the PHY base address to 12 for mt7530 and 8 for others,
which is based on the default setting for some devices
from printing the register with the following command
after it is written to by uboot during the boot cycle.
`md 0x10117014 1`
PHY_BASE option only uses 5 bits of the register,
bits 16 to 20, so use 8-bit integer type.
Set the option using the DTS property mediatek,ephy-base
and create the gsw node if missing.
Also, added a kernel message to display the EPHY base address.
Note:
If anything is written to a PHY address that is greater than 1 hex char (greater than 0xf)
then there is adverse effects with Atheros switches.
Signed-off-by: Michael Pratt <mcpratt@pm.me>
When the new variable ephy_base was introduced,
it was not applied to the if block for mdio_mode.
The first line in the mdio_mode if block
sets the EPHY base address to 12 in the SOC by writing a register,
but the corresponding variable in the driver
was still set to the default of 0.
This causes subsequent lines that write registers with the function
_mt7620_mii_write
to write to PHY addresses 0 through 4
while internal PHYs have been moved to addresses 12 through 16.
All of these lines are intended only for PHYs on the SOC internal switch,
however, they are being written to external ethernet switches
if they exist at those PHY addresses 0 through 4.
This causes some ethernet ports to be broken on boards with AR8327 or QCA8337 switch.
Other suggested fixes move those lines to the else block of mdio_mode,
but removing the else block completely also fixes it.
Therefore, move the lines to the mt7620_hw_init function main block,
and have only one instance of the function mtk_switch_w32
for writing the register with the EPHY base address.
In theory, this also allows for boards that have both external switches
and internal PHYs that lead to ethernet ports to be supported.
Fixes: 391df37829 ("ramips: mt7620: add EPHY base mdio address changing possibility")
Signed-off-by: Michael Pratt <mcpratt@pm.me>
A workaround was added to the switch driver
to set SOC port 4 as an RGMII GMAC interface
based on the DTS property mediatek,port4-gmac.
(previously mediatek,port4)
However, the ethernet driver already does this,
but is being blocked by a return statement
whenever the phy-handle and fixed-link properties
are both missing from nodes that define the port properties.
Revert the workaround, so that both the switch driver
and ethernet driver are not doing the same thing
and move the phy-handle related lines down
so nothing is ending the function prematurely.
While at it, clean up kernel messages
and delete useless return statements.
Fixes: f6d81e2fa1 ("mt7620: gsw: make IntPHY and ExtPHY share mdio addr 4 possible")
Signed-off-by: Michael Pratt <mcpratt@pm.me>
These nodes are used for configuring a GMAC interface
and for defining external PHYs to be accessed with MDIO.
None of this is possible on MT7620N, only MT7620A,
so remove them from all MT7620N DTS.
When the mdio-bus node is missing, the driver returns -NODEV
which causes the internal switch to not initialize.
Replace that return so that everything works without the DTS node.
Also, an extra kernel message to indicate for all error conditions
that mdio-bus is disabled.
Fixes: d482356322 ("ramips: mt7620n: add mdio node and disable port4 by default")
Fixes: aa5014dd1a ("ramips: mt7620n: enable port 4 as EPHY by default")
Signed-off-by: Michael Pratt <mcpratt@pm.me>
There are only 2 options in the driver
for the function of mt7620 internal switch port 4:
EPHY mode (RJ-45, internal PHY)
GMAC mode (RGMII, external PHY)
Let the DTS property be boolean instead of string
where EPHY mode is the default.
Fix how the properties are written
for all DTS that use them,
and add missing nodes where applicable,
and remove useless nodes,
and minor DTS formatting.
Signed-off-by: Michael Pratt <mcpratt@pm.me>
Vlan subinterface was never brought up when using vlan-based preinit network.
Tested forcing ifname="" before preinit_ip() on a Tp-Link Archer C5v4.
Signed-off-by: Luiz Angelo Daros de Luca <luizluca@gmail.com>
The RTL8380-RTL9300 switches only forward packets when VLAN ID 1 is
configured. Do not use the standard failsafe configuration for DSA
accessing the default port directly, but configure a switch on the lan1
interface instead.
This will add the VLAN ID 1 configuration to the switch:
$ bridge vlan show
port vlan-id
lan1 1 PVID Egress Untagged
switch 1 PVID Egress Untagged
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Some interfaces have a VLAN modifier like :t in lan1:t, this modifier
should be removed from the interface before calling preinit_ip_config().
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Adapt the preinit_config_board() to the board.json network changes. It
now looks for the device and the ports variables to configure the LAN
network.
This works with swconfig configurations.
Fixes: FS#3866
Fixes: d42640e389 ("base-files: use "ports" array in board.json network for bridges")
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Reviewed-by: Rafał Miłecki <rafal@milecki.pl>
Without this patch we have to manually bring up the CPU interface in
failsafe mode.
This was backported from kernel 5.12.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Tested-by: Rafał Miłecki <rafal@milecki.pl>
These are the latest patches that just landed upstream for 5.13, will be
backported by Greg into 5.10 (because of stable@), and are now in the
5.4 backport branch of wireguard: https://git.zx2c4.com/wireguard-linux/log/?h=backport-5.4.y
Cc: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com>
Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
Tested-by: Stijn Segers <foss@volatilesystems.org>
CONFIG_CRYPTO_DEV_HIFN_795X depends on PCI. This driver only makes sense on
devices with pci support.
Signed-off-by: Aleksander Jan Bajkowski <A.Bajkowski@stud.elka.pw.edu.pl>
Fixes the buffer and packet length calculations for Ethernet TX on
the RTL8380 SoC when CRC calculation offload is enabled.
CRC-offload is always done by the SoC, but additional CRC
calculation was previously done also by the kernel.
It also fixes detection of the DSA tag for packets on RTL8390
SoCs for ports > 28.
v2 has correct whitespace
Signed-off-by: Birger Koblitz <mail@birger-koblitz.de>
In the aftermath of the KRACK attacks, hostapd gained an AP-side workaround
against WNM-Sleep Mode GTK/IGTK reinstallation attacks. WNM Sleep Mode is not
enabled by default on OpenWrt, but it is configurable through the option
wnm_sleep_mode. Thus, make the AP-side workaround configurable as well by
exposing the option wnm_sleep_mode_no_keys. If you use the option
wpa_disable_eapol_key_retries and have wnm_sleep_mode enabled, you might
consider using this workaround.
Signed-off-by: Timo Sigurdsson <public_timo.s@silentcreek.de>
There are services that have only STOP value set. They are executed only
on shutdown and it is common to use them for system cleanup. There is
one such service shipped directly with base-files, it is 'umount'. Those
work the same way as those with START but enabled does not report them
as enabled although it should have as they can be enabled and disabled
as any other service.
This also changes check from check for executable to check for symbolic
link. The implementation depends on those being links to service file
and it is much cleaner and direct to check for them being links.
Signed-off-by: Karel Kočí <karel.koci@nic.cz>
Commit 0a7657c ("hostapd: add channel utilization as config option") added the
two new uci options bss_load_update_period and chan_util_avg_period. However,
the corresponding "config_add_int" calls for these options weren't added, so
attempting to actually use these options and change their values is bound to
fail - they always stay at their defaults. Add the missing code to actually
make these options work.
Fixes: 0a7657c ("hostapd: add channel utilization as config option")
Signed-off-by: Timo Sigurdsson <public_timo.s@silentcreek.de>
The country3 option in hostapd.conf allows the third octet of the country
string to be set. It can be used e.g. to indicate indoor or outdoor use (see
hostapd.conf for further details). Make this option configurable but optional
in OpenWrt.
Signed-off-by: Timo Sigurdsson <public_timo.s@silentcreek.de>
This adds conflicts between variants of libustream pacakge.
They provide the same file and thus it should not be possible to install
them side by side.
Signed-off-by: Karel Kočí <karel.koci@nic.cz>
Without loading the igb at boot, the recovery wouldn't have
network available. All network drivers should be loaded before
etc/board.d/02_network is called. Note that other network drivers
already have this set, such as tg3.
Fixes: 7e0e5110bc ("kernel: add igb kernel module")
Signed-off-by: Chris Blake <chrisrblake93@gmail.com>
The file is a info file just like config.buildinfo, feeds.buildinfo and
version.buildinfo. It bundles these and more information in a machine
readable way.
This commit enables the creation of profiles.json by default and not
only for buildbots. By doing so it follow the behaviour of the
ImageBuilder which always creates the file, lastly this increases the
files visibility for downstream projects.
Signed-off-by: Paul Spooren <mail@aparcar.org>
Currently, the option to disable subpage writing is only set
when a HW ECC engine is used.
Some boards lack a HW ECC engine and use software for that.
In this case, this NAND option does not get set when the NAND chip
does not support it, resulting in mounting errors.
Move the setting of this option to a generic init location so it
gets set for all types where required.
While at it, also OR the option instead of just setting it
so we don't overwrite potential flags being set somewhere else.
Before:
[ 1.681273] UBI: auto-attach mtd2
[ 1.684669] ubi0: attaching mtd2
[ 1.688877] ubi0 error: validate_ec_hdr: bad VID header offset 2048, expected 512
[ 1.696469] ubi0 error: validate_ec_hdr: bad EC header
[ 1.701712] Erase counter header dump:
[ 1.705512] magic 0x55424923
[ 1.709322] version 1
[ 1.712330] ec 1
[ 1.715331] vid_hdr_offset 2048
[ 1.718610] data_offset 4096
[ 1.721880] image_seq 1462320675
[ 1.725680] hdr_crc 0x12255a15
After:
1.680917] UBI: auto-attach mtd2
[ 1.684308] ubi0: attaching mtd2
[ 2.954504] random: crng init done
[ 3.142813] ubi0: scanning is finished
[ 3.163455] ubi0: attached mtd2 (name "ubi", size 124 MiB)
[ 3.169069] ubi0: PEB size: 131072 bytes (128 KiB), LEB size: 126976 bytes
[ 3.176037] ubi0: min./max. I/O unit sizes: 2048/2048, sub-page size 2048
[ 3.182942] ubi0: VID header offset: 2048 (aligned 2048), data offset: 4096
[ 3.190013] ubi0: good PEBs: 992, bad PEBs: 0, corrupted PEBs: 0
[ 3.196102] ubi0: user volume: 3, internal volumes: 1, max. volumes count: 128
[ 3.203434] ubi0: max/mean erase counter: 2/0, WL threshold: 4096, image sequence number: 1462320675
[ 3.212700] ubi0: available PEBs: 0, total reserved PEBs: 992, PEBs reserved for bad PEB handling: 20
[ 3.222124] ubi0: background thread "ubi_bgt0d" started, PID 317
[ 3.230246] block ubiblock0_1: created from ubi0:1(rootfs)
[ 3.235819] ubiblock: device ubiblock0_1 (rootfs) set to be root filesystem
[ 3.256830] VFS: Mounted root (squashfs filesystem) readonly on device 254:0.
Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
This board has been supported in the ar71xx.
Links:
* https://mikrotik.com/product/RB912UAG-2HPnD
* https://openwrt.org/toh/hwdata/mikrotik/mikrotik_rb912uag-2hpnd
This also supports the 5GHz flavour of the board.
Hardware:
* SoC: Atheros AR9342,
* RAM: DDR 64MB,
* SPI NOR: 64KB,
* NAND: 128MB,
* Ethernet: x1 10/100/1000 port with passive POE in,
* Wi-Fi: 802.11 b/g/n,
* PCIe,
* USB: 2.0 EHCI controller, connected to mPCIe slot and a Type-A
port -- both can be used for LTE modem, but only one can be
used at any time.
* LEDs: 5 general purpose LEDs (led1..led5), power LED, user LED,
Ethernet phy LED,
* Button,
* Beeper.
Not working:
* Button: it shares gpio line 15 with NAND ALE and NAND IO7,
and current drivers doesn't easily support this configuration,
* Beeper: it is connected to bit 5 of a serial shift register
(tested with sysfs led trigger timer). But kmod-gpio-beeper
doesn't work -- we left this as is for now.
Flashing:
* Use the RouterBOARD Reset button to enable TFTP netboot,
boot kernel and initramfs and then perform sysupgrade.
* From ar71xx OpenWrt firmware run:
$ sysupgrade -F /tmp/<sysupgrade.bin>
For more info see: https://openwrt.org/toh/mikrotik/common.
Co-Developed-by: Koen Vandeputte <koen.vandeputte@citymesh.com>
Reviewed-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
Signed-off-by: Denis Kalashnikov <denis281089@gmail.com>
Main part is copied from ar71xx original driver rb91x_nand
written by Gabor Juhos <juhosg@openwrt.org>.
What is done:
* Support of kernel 5.4 and 5.10,
* DTS support,
* New gpio API (gpiod_*) support.
Reviewed-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
Signed-off-by: Denis Kalashnikov <denis281089@gmail.com>
This is a slighty modified version of ar71xx gpio-latch driver
written by Gabor Juhos <juhosg@openwrt.org>.
Changes:
* DTS support,
* New gpio API (gpiod_*).
Reviewed-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
Signed-off-by: Denis Kalashnikov <denis281089@gmail.com>
If the image generation doesn't add any profiles to the output the
*profile merge* will fail. To avoid that set an empty profile as
fallback.
Signed-off-by: Paul Spooren <mail@aparcar.org>
commit 50413e1ec8 replaced ifconfig
with ip. In order to set a link state to up, the interface needs
to be added first.
Fixes: FS#3754
Signed-off-by: Perry Melange <isprotejesvalkata@gmail.com>
[Add Fixes tag]
Signed-off-by: Baptiste Jonglez <git@bitsofnetworks.org>
All bcm4908 devices are expected to have GPIO buttons to make relevant
package selected by default.
This "fixes" triggering failsafe mode.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Compile with Ninja. Ninja compiles faster and is more stable with
parallel builds. Routines copied from cmake.mk.
Speed improves from:
Executed in 127.47 secs fish external
usr time 17.02 mins 446.00 micros 17.02 mins
sys time 1.18 mins 40.00 micros 1.18 mins
to:
Executed in 118.91 secs fish external
usr time 17.28 mins 499.00 micros 17.28 mins
sys time 1.13 mins 45.00 micros 1.13 mins
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Make it possible to specify the SAE mechanism for PWE derivation. The
following values are possible:
0 = hunting-and-pecking loop only
1 = hash-to-element only
2 = both hunting-and-pecking loop and hash-to-element enabled
hostapd currently defaults to hunting-and-pecking loop only.
Signed-off-by: Michael Yartys <michael.yartys@protonmail.com>
Rui Salvaterra