391 lines
6.3 KiB
Plaintext
391 lines
6.3 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/* Copyright (c) 2022, Matthew Hagan <mnhagan88@gmail.com> */
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/dts-v1/;
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#include "ipq8074.dtsi"
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#include "ipq8074-ac-cpu.dtsi"
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#include "ipq8074-ess.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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/ {
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model = "Edgecore EAP102";
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compatible = "edgecore,eap102", "qcom,ipq8074";
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aliases {
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serial0 = &blsp1_uart5;
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serial1 = &blsp1_uart3;
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led-boot = &led_system_green;
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led-failsafe = &led_system_green;
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led-running = &led_system_green;
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led-upgrade = &led_system_green;
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/* Aliases as required by u-boot to patch MAC addresses */
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ethernet0 = &dp6;
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ethernet1 = &dp5;
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label-mac-device = &dp5;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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bootargs-append = " root=/dev/ubiblock0_1";
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};
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keys {
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compatible = "gpio-keys";
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pinctrl-0 = <&button_pins>;
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pinctrl-names = "default";
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reset {
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label = "reset";
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gpios = <&tlmm 66 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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};
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leds {
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compatible = "gpio-leds";
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led_wanpoe {
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label = "green:wanpoe";
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gpios = <&tlmm 46 GPIO_ACTIVE_HIGH>;
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};
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led_wlan2g {
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label = "green:wlan2g";
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gpio = <&tlmm 47 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "phy1radio";
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};
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led_wlan5g {
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label = "green:wlan5g";
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gpio = <&tlmm 48 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "phy0radio";
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};
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led_system_green: led_system {
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function = LED_FUNCTION_POWER;
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color = <LED_COLOR_ID_GREEN>;
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gpios = <&tlmm 50 GPIO_ACTIVE_HIGH>;
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};
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};
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};
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&tlmm {
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mdio_pins: mdio-pins {
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mdc {
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pins = "gpio68";
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function = "mdc";
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drive-strength = <8>;
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bias-pull-up;
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};
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mdio {
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pins = "gpio69";
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function = "mdio";
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drive-strength = <8>;
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bias-pull-up;
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};
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};
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button_pins: button_pins {
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reset_button {
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pins = "gpio66";
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function = "gpio";
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drive-strength = <8>;
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bias-pull-up;
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};
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};
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};
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&blsp1_spi1 {
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status = "okay";
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flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0>;
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compatible = "jedec,spi-nor";
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spi-max-frequency = <50000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "0:sbl1";
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reg = <0x0 0x50000>;
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read-only;
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};
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partition@50000 {
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label = "0:mibib";
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reg = <0x50000 0x10000>;
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read-only;
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};
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partition@60000 {
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label = "0:bootconfig";
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reg = <0x60000 0x20000>;
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read-only;
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};
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partition@80000 {
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label = "0:bootconfig1";
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reg = <0x80000 0x20000>;
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read-only;
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};
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partition@a0000 {
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label = "0:qsee";
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reg = <0xa0000 0x180000>;
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read-only;
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};
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partition@220000 {
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label = "0:qsee_1";
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reg = <0x220000 0x180000>;
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read-only;
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};
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partition@3a0000 {
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label = "0:devcfg";
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reg = <0x3a0000 0x10000>;
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read-only;
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};
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partition@3b0000 {
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label = "0:devcfg_1";
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reg = <0x3b0000 0x10000>;
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read-only;
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};
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partition@3c0000 {
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label = "0:apdp";
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reg = <0x3c0000 0x10000>;
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read-only;
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};
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partition@3d0000 {
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label = "0:apdp_1";
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reg = <0x3d0000 0x10000>;
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read-only;
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};
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partition@3e0000 {
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label = "0:rpm";
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reg = <0x3e0000 0x40000>;
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read-only;
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};
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partition@420000 {
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label = "0:rpm_1";
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reg = <0x420000 0x40000>;
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read-only;
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};
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partition@460000 {
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label = "0:cdt";
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reg = <0x460000 0x10000>;
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read-only;
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};
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partition@470000 {
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label = "0:cdt_1";
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reg = <0x470000 0x10000>;
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read-only;
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};
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partition@480000 {
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label = "0:appsblenv";
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reg = <0x480000 0x10000>;
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};
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partition@490000 {
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label = "0:appsbl";
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reg = <0x490000 0xc0000>;
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read-only;
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};
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partition@550000 {
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label = "0:appsbl_1";
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reg = <0x530000 0xc0000>;
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read-only;
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};
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partition@610000 {
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label = "0:art";
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reg = <0x610000 0x40000>;
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read-only;
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};
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partition@650000 {
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label = "0:ethphyfw";
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reg = <0x650000 0x80000>;
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read-only;
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};
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partition@6d0000 {
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label = "0:product_info";
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reg = <0x6d0000 0x80000>;
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read-only;
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};
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partition@750000 {
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label = "priv_data1";
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reg = <0x750000 0x10000>;
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read-only;
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};
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partition@760000 {
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label = "priv_data2";
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reg = <0x760000 0x10000>;
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read-only;
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};
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};
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};
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};
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&blsp1_uart3 {
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status = "okay";
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};
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&blsp1_uart5 {
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status = "okay";
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};
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&crypto {
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status = "okay";
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};
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&cryptobam {
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status = "okay";
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};
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&prng {
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status = "okay";
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};
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&qpic_bam {
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status = "okay";
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};
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&qusb_phy_0 {
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status = "okay";
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};
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&ssphy_0 {
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status = "okay";
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};
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&usb_0 {
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status = "okay";
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};
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&qpic_nand {
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status = "okay";
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nand@0 {
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reg = <0>;
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nand-ecc-strength = <8>;
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nand-ecc-step-size = <512>;
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nand-bus-width = <8>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "rootfs1";
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reg = <0x0000000 0x3400000>;
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};
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partition@3400000 {
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label = "0:wififw";
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reg = <0x3400000 0x800000>;
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read-only;
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};
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partition@3c00000 {
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label = "rootfs2";
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reg = <0x3c00000 0x3400000>;
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};
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partition@7000000 {
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label = "0:wififw_1";
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reg = <0x7000000 0x800000>;
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read-only;
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};
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};
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};
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};
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&mdio {
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status = "okay";
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pinctrl-0 = <&mdio_pins>;
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pinctrl-names = "default";
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qca8081_24: ethernet-phy@24 {
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compatible = "ethernet-phy-id004d.d101";
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reg = <24>;
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reset-deassert-us = <10000>;
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reset-gpios = <&tlmm 33 GPIO_ACTIVE_LOW>;
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};
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qca8081_28: ethernet-phy@28 {
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compatible = "ethernet-phy-id004d.d101";
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reg = <28>;
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reset-deassert-us = <10000>;
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reset-gpios = <&tlmm 44 GPIO_ACTIVE_LOW>;
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};
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};
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&switch {
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status = "okay";
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switch_lan_bmp = <ESS_PORT5>; /* lan port bitmap */
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switch_wan_bmp = <ESS_PORT6>; /* wan port bitmap */
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switch_mac_mode1 = <MAC_MODE_SGMII_CHANNEL0>; /* mac mode for uniphy instance1*/
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switch_mac_mode2 = <MAC_MODE_SGMII_CHANNEL0>; /* mac mode for uniphy instance2*/
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qcom,port_phyinfo {
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port@5 {
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port_id = <5>;
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phy_address = <24>;
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port_mac_sel = "QGMAC_PORT";
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};
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port@6 {
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port_id = <6>;
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phy_address = <28>;
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port_mac_sel = "QGMAC_PORT";
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};
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};
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};
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&edma {
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status = "okay";
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};
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&dp5 {
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status = "okay";
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phy-mode = "sgmii";
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phy-handle = <&qca8081_24>;
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label = "lan";
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};
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&dp6 {
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status = "okay";
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phy-handle = <&qca8081_28>;
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label = "wan";
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};
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&wifi {
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status = "okay";
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qcom,ath11k-calibration-variant = "Edgecore-EAP102";
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};
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