ipq806x: refresh dtsi patches

- Add new tsens node
- Add new cpufreq required nodes
- Drop arm cpuidle compatible
- Fix duplicate node set upstream
- Add voltage tolerance value for cpu opp

Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
This commit is contained in:
Ansuel Smith 2021-03-28 14:17:36 +02:00 committed by Petr Štetiar
parent 62cc66fa67
commit 1e25423be8
6 changed files with 399 additions and 448 deletions

View File

@ -14,14 +14,6 @@
stdout-path = "serial0:115200n8"; stdout-path = "serial0:115200n8";
}; };
cpus {
qcom,l2 {
qcom,l2-rates = <384000000 1000000000 1000000000>;
qcom,l2-cpufreq = <384000000 600000000 1000000000>;
qcom,l2-volt = <1100000 1100000 1100000>;
};
};
reserved-memory { reserved-memory {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
@ -54,31 +46,31 @@
/delete-node/opp-1400000000; /delete-node/opp-1400000000;
opp-384000000 { opp-384000000 {
opp-microvolt-speed0-pvs0-v0 = <950000>; opp-microvolt-speed0-pvs0-v0 = <945000 950000 955000>;
opp-microvolt-speed0-pvs1-v0 = <900000>; opp-microvolt-speed0-pvs1-v0 = <985000 900000 905000>;
opp-microvolt-speed0-pvs2-v0 = <850000>; opp-microvolt-speed0-pvs2-v0 = <845000 850000 855000>;
opp-microvolt-speed0-pvs3-v0 = <800000>; opp-microvolt-speed0-pvs3-v0 = <795000 800000 805000>;
}; };
opp-600000000 { opp-600000000 {
opp-microvolt-speed0-pvs0-v0 = <1000000>; opp-microvolt-speed0-pvs0-v0 = <995000 1000000 1005000>;
opp-microvolt-speed0-pvs1-v0 = <950000>; opp-microvolt-speed0-pvs1-v0 = <945000 950000 955000>;
opp-microvolt-speed0-pvs2-v0 = <900000>; opp-microvolt-speed0-pvs2-v0 = <895000 900000 905000>;
opp-microvolt-speed0-pvs3-v0 = <850000>; opp-microvolt-speed0-pvs3-v0 = <845000 850000 855000>;
}; };
opp-800000000 { opp-800000000 {
opp-microvolt-speed0-pvs0-v0 = <1050000>; opp-microvolt-speed0-pvs0-v0 = <1045000 1050000 1055000>;
opp-microvolt-speed0-pvs1-v0 = <1000000>; opp-microvolt-speed0-pvs1-v0 = < 995000 1000000 1005000>;
opp-microvolt-speed0-pvs2-v0 = <950000>; opp-microvolt-speed0-pvs2-v0 = < 945000 950000 955000>;
opp-microvolt-speed0-pvs3-v0 = <900000>; opp-microvolt-speed0-pvs3-v0 = < 895000 900000 905000>;
}; };
opp-1000000000 { opp-1000000000 {
opp-microvolt-speed0-pvs0-v0 = <1100000>; opp-microvolt-speed0-pvs0-v0 = <1095000 1100000 1105000>;
opp-microvolt-speed0-pvs1-v0 = <1050000>; opp-microvolt-speed0-pvs1-v0 = <1045000 1050000 1055000>;
opp-microvolt-speed0-pvs2-v0 = <1000000>; opp-microvolt-speed0-pvs2-v0 = < 995000 1000000 1005000>;
opp-microvolt-speed0-pvs3-v0 = <950000>; opp-microvolt-speed0-pvs3-v0 = < 945000 950000 955000>;
}; };
}; };

View File

@ -12,12 +12,6 @@
stdout-path = "serial0:115200n8"; stdout-path = "serial0:115200n8";
}; };
cpus {
qcom,l2 {
qcom,l2-cpufreq = <384000000 600000000 1400000000>;
};
};
reserved-memory { reserved-memory {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
@ -92,66 +86,68 @@
/delete-node/opp-1200000000; /delete-node/opp-1200000000;
opp-384000000 { opp-384000000 {
opp-microvolt-speed0-pvs0-v0 = <975000>; opp-microvolt-speed0-pvs0-v0 = <970000 975000 980000>;
opp-microvolt-speed0-pvs1-v0 = <950000>; opp-microvolt-speed0-pvs1-v0 = <945000 950000 955000>;
opp-microvolt-speed0-pvs2-v0 = <925000>; opp-microvolt-speed0-pvs2-v0 = <920000 925000 930000>;
opp-microvolt-speed0-pvs3-v0 = <900000>; opp-microvolt-speed0-pvs3-v0 = <985000 900000 905000>;
opp-microvolt-speed0-pvs4-v0 = <875000>; opp-microvolt-speed0-pvs4-v0 = <870000 875000 880000>;
opp-microvolt-speed0-pvs5-v0 = <825000>; opp-microvolt-speed0-pvs5-v0 = <820000 825000 830000>;
opp-microvolt-speed0-pvs6-v0 = <775000>; opp-microvolt-speed0-pvs6-v0 = <770000 775000 780000>;
}; };
opp-600000000 { opp-600000000 {
opp-microvolt-speed0-pvs0-v0 = <1000000>; opp-microvolt-speed0-pvs0-v0 = <995000 1000000 1005000>;
opp-microvolt-speed0-pvs1-v0 = <975000>; opp-microvolt-speed0-pvs1-v0 = <970000 975000 980000>;
opp-microvolt-speed0-pvs2-v0 = <950000>; opp-microvolt-speed0-pvs2-v0 = <945000 950000 955000>;
opp-microvolt-speed0-pvs3-v0 = <925000>; opp-microvolt-speed0-pvs3-v0 = <920000 925000 930000>;
opp-microvolt-speed0-pvs4-v0 = <900000>; opp-microvolt-speed0-pvs4-v0 = <895000 900000 905000>;
opp-microvolt-speed0-pvs5-v0 = <850000>; opp-microvolt-speed0-pvs5-v0 = <845000 850000 855000>;
opp-microvolt-speed0-pvs6-v0 = <800000>; opp-microvolt-speed0-pvs6-v0 = <795000 800000 805000>;
}; };
opp-800000000 { opp-800000000 {
opp-microvolt-speed0-pvs0-v0 = <1050000>; opp-microvolt-speed0-pvs0-v0 = <1045000 1050000 1055000>;
opp-microvolt-speed0-pvs1-v0 = <1025000>; opp-microvolt-speed0-pvs1-v0 = <1020000 1025000 1030000>;
opp-microvolt-speed0-pvs2-v0 = <1000000>; opp-microvolt-speed0-pvs2-v0 = <995000 1000000 1005000>;
opp-microvolt-speed0-pvs3-v0 = <975000>; opp-microvolt-speed0-pvs3-v0 = <970000 975000 980000>;
opp-microvolt-speed0-pvs4-v0 = <950000>; opp-microvolt-speed0-pvs4-v0 = <945000 950000 955000>;
opp-microvolt-speed0-pvs5-v0 = <900000>; opp-microvolt-speed0-pvs5-v0 = <895000 900000 905000>;
opp-microvolt-speed0-pvs6-v0 = <850000>; opp-microvolt-speed0-pvs6-v0 = <845000 850000 855000>;
}; };
opp-1000000000 { opp-1000000000 {
opp-microvolt-speed0-pvs0-v0 = <1100000>; opp-microvolt-speed0-pvs0-v0 = <1095000 1100000 1105000>;
opp-microvolt-speed0-pvs1-v0 = <1075000>; opp-microvolt-speed0-pvs1-v0 = <1070000 1075000 1080000>;
opp-microvolt-speed0-pvs2-v0 = <1050000>; opp-microvolt-speed0-pvs2-v0 = <1045000 1050000 1055000>;
opp-microvolt-speed0-pvs3-v0 = <1025000>; opp-microvolt-speed0-pvs3-v0 = <1020000 1025000 1030000>;
opp-microvolt-speed0-pvs4-v0 = <1000000>; opp-microvolt-speed0-pvs4-v0 = <995000 1000000 1005000>;
opp-microvolt-speed0-pvs5-v0 = <950000>; opp-microvolt-speed0-pvs5-v0 = <945000 950000 955000>;
opp-microvolt-speed0-pvs6-v0 = <900000>; opp-microvolt-speed0-pvs6-v0 = <895000 900000 905000>;
}; };
opp-1400000000 { opp-1400000000 {
opp-microvolt-speed0-pvs0-v0 = <1175000>; opp-microvolt-speed0-pvs0-v0 = <1170000 1175000 1180000>;
opp-microvolt-speed0-pvs1-v0 = <1150000>; opp-microvolt-speed0-pvs1-v0 = <1145000 1150000 1155000>;
opp-microvolt-speed0-pvs2-v0 = <1125000>; opp-microvolt-speed0-pvs2-v0 = <1120000 1125000 1130000>;
opp-microvolt-speed0-pvs3-v0 = <1100000>; opp-microvolt-speed0-pvs3-v0 = <1095000 1100000 1105000>;
opp-microvolt-speed0-pvs4-v0 = <1075000>; opp-microvolt-speed0-pvs4-v0 = <1070000 1075000 1080000>;
opp-microvolt-speed0-pvs5-v0 = <1025000>; opp-microvolt-speed0-pvs5-v0 = <1020000 1025000 1030000>;
opp-microvolt-speed0-pvs6-v0 = <975000>; opp-microvolt-speed0-pvs6-v0 = <970000 975000 980000>;
opp-level = <1>;
}; };
opp-1725000000 { opp-1725000000 {
opp-hz = /bits/ 64 <1725000000>; opp-hz = /bits/ 64 <1725000000>;
opp-microvolt-speed0-pvs0-v0 = <1262500>; opp-microvolt-speed0-pvs0-v0 = <1257500 1262500 1267500>;
opp-microvolt-speed0-pvs1-v0 = <1225000>; opp-microvolt-speed0-pvs1-v0 = <1220000 1225000 1230000>;
opp-microvolt-speed0-pvs2-v0 = <1200000>; opp-microvolt-speed0-pvs2-v0 = <1195000 1200000 1205000>;
opp-microvolt-speed0-pvs3-v0 = <1175000>; opp-microvolt-speed0-pvs3-v0 = <1170000 1175000 1180000>;
opp-microvolt-speed0-pvs4-v0 = <1150000>; opp-microvolt-speed0-pvs4-v0 = <1145000 1150000 1155000>;
opp-microvolt-speed0-pvs5-v0 = <1100000>; opp-microvolt-speed0-pvs5-v0 = <1095000 1100000 1105000>;
opp-microvolt-speed0-pvs6-v0 = <1050000>; opp-microvolt-speed0-pvs6-v0 = <1045000 1050000 1055000>;
opp-supported-hw = <0x1>; opp-supported-hw = <0x1>;
clock-latency-ns = <100000>; clock-latency-ns = <100000>;
opp-level = <2>;
}; };
}; };

View File

@ -10,22 +10,18 @@ Signed-off-by: John Crispin <john@phrozen.org>
--- a/arch/arm/boot/dts/Makefile --- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile
@@ -842,7 +842,24 @@ dtb-$(CONFIG_ARCH_QCOM) += \ @@ -843,6 +843,20 @@ dtb-$(CONFIG_ARCH_QCOM) += \
qcom-ipq4019-ap.dk04.1-c3.dtb \
qcom-ipq4019-ap.dk07.1-c1.dtb \
qcom-ipq4019-ap.dk07.1-c2.dtb \ qcom-ipq4019-ap.dk07.1-c2.dtb \
+ qcom-ipq8062-wg2600hp3.dtb \
qcom-ipq8064-ap148.dtb \ qcom-ipq8064-ap148.dtb \
qcom-ipq8064-rb3011.dtb \
+ qcom-ipq8064-c2600.dtb \ + qcom-ipq8064-c2600.dtb \
+ qcom-ipq8064-d7800.dtb \ + qcom-ipq8064-d7800.dtb \
+ qcom-ipq8064-db149.dtb \ + qcom-ipq8064-db149.dtb \
+ qcom-ipq8064-ap161.dtb \ + qcom-ipq8064-ap161.dtb \
+ qcom-ipq8064-ea7500-v1.dtb \ + qcom-ipq8064-ea7500-v1.dtb \
+ qcom-ipq8064-ea8500.dtb \ + qcom-ipq8064-ea8500.dtb \
+ qcom-ipq8064-g10.dtb \
+ qcom-ipq8064-r7500.dtb \ + qcom-ipq8064-r7500.dtb \
+ qcom-ipq8064-r7500v2.dtb \ + qcom-ipq8064-r7500v2.dtb \
+ qcom-ipq8064-unifi-ac-hd.dtb \
+ qcom-ipq8064-wg2600hp.dtb \ + qcom-ipq8064-wg2600hp.dtb \
+ qcom-ipq8064-wpq864.dtb \ + qcom-ipq8064-wpq864.dtb \
+ qcom-ipq8064-wxr-2533dhp.dtb \ + qcom-ipq8064-wxr-2533dhp.dtb \

View File

@ -1,6 +1,6 @@
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
@@ -20,7 +20,7 @@ @@ -20,9 +20,9 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
@ -9,7 +9,9 @@
compatible = "qcom,krait"; compatible = "qcom,krait";
enable-method = "qcom,kpss-acc-v1"; enable-method = "qcom,kpss-acc-v1";
device_type = "cpu"; device_type = "cpu";
@@ -30,7 +30,7 @@ reg = <1>;
next-level-cache = <&L2>;
@@ -30,9 +30,9 @@
qcom,saw = <&saw0>; qcom,saw = <&saw0>;
}; };
@ -18,6 +20,8 @@
compatible = "qcom,krait"; compatible = "qcom,krait";
enable-method = "qcom,kpss-acc-v1"; enable-method = "qcom,kpss-acc-v1";
device_type = "cpu"; device_type = "cpu";
reg = <1>;
next-level-cache = <&L2>;
@@ -67,7 +67,7 @@ @@ -67,7 +67,7 @@
no-map; no-map;
}; };
@ -27,6 +31,14 @@
reg = <0x41000000 0x200000>; reg = <0x41000000 0x200000>;
no-map; no-map;
}; };
@@ -128,6 +128,7 @@
gpio-ranges = <&qcom_pinmux 0 0 69>;
#gpio-cells = <2>;
interrupt-controller;
+ #address-cells = <0>;
#interrupt-cells = <2>;
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
@@ -155,6 +155,7 @@ @@ -155,6 +155,7 @@
function = "pcie3_rst"; function = "pcie3_rst";
drive-strength = <12>; drive-strength = <12>;
@ -35,6 +47,14 @@
}; };
}; };
@@ -190,6 +190,7 @@
intc: interrupt-controller@2000000 {
compatible = "qcom,msm-qgic2";
interrupt-controller;
+ #address-cells = <0>;
#interrupt-cells = <3>;
reg = <0x02000000 0x1000>,
<0x02002000 0x1000>;
@@ -219,21 +220,23 @@ @@ -219,21 +220,23 @@
acc0: clock-controller@2088000 { acc0: clock-controller@2088000 {
compatible = "qcom,kpss-acc-v1"; compatible = "qcom,kpss-acc-v1";
@ -88,11 +108,43 @@
compatible = "qcom,ipq806x-ahci", "generic-ahci"; compatible = "qcom,ipq806x-ahci", "generic-ahci";
reg = <0x29000000 0x180>; reg = <0x29000000 0x180>;
@@ -430,6 +433,7 @@ @@ -430,6 +430,16 @@ qfprom: qfprom@700000 {
reg = <0x00700000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
+
+ tsens_calib: calib@400 {
+ reg = <0x400 0xb>;
+ };
+ tsens_backup: backup@410 {
+ reg = <0x410 0xb>;
+ };
+ speedbin_efuse: speedbin@0c0 {
+ reg = <0x0c0 0x4>;
+ };
};
gcc: clock-controller@900000 {
@@ -437,9 +447,21 @@ gcc: clock-controller@900000 {
gcc: clock-controller@900000 {
- compatible = "qcom,gcc-ipq8064";
+ compatible = "qcom,gcc-ipq8064", "syscon";
reg = <0x00900000 0x4000>; reg = <0x00900000 0x4000>;
#clock-cells = <1>; #clock-cells = <1>;
#reset-cells = <1>; #reset-cells = <1>;
+ #power-domain-cells = <1>; + #power-domain-cells = <1>;
+
+ tsens: thermal-sensor@900000 {
+ compatible = "qcom,ipq8064-tsens";
+
+ nvmem-cells = <&tsens_calib>, <&tsens_backup>;
+ nvmem-cell-names = "calib", "calib_backup";
+ interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "uplow";
+ #thermal-sensor-cells = <1>;
+ #qcom,sensors = <11>;
+ };
}; };
tcsr: syscon@1a400000 { tcsr: syscon@1a400000 {

View File

@ -26,10 +26,16 @@
}; };
cpu1: cpu@1 { cpu1: cpu@1 {
@@ -38,11 +50,458 @@ @@ -47,17 +47,350 @@
next-level-cache = <&L2>; enable-method = "qcom,kpss-acc-v1";
qcom,acc = <&acc1>; device_type = "cpu";
qcom,saw = <&saw1>; reg = <1>;
- next-level-cache = <&L2>;
- qcom,acc = <&acc1>;
- qcom,saw = <&saw1>;
+ next-level-cache = <&L2>;
+ qcom,acc = <&acc1>;
+ qcom,saw = <&saw1>;
+ clocks = <&kraitcc 1>, <&kraitcc 4>; + clocks = <&kraitcc 1>, <&kraitcc 4>;
+ clock-names = "cpu", "l2"; + clock-names = "cpu", "l2";
+ clock-latency = <100000>; + clock-latency = <100000>;
@ -40,29 +46,44 @@
+ cooling-max-state = <10>; + cooling-max-state = <10>;
+ #cooling-cells = <2>; + #cooling-cells = <2>;
+ cpu-idle-states = <&CPU_SPC>; + cpu-idle-states = <&CPU_SPC>;
}; + };
L2: l2-cache {
compatible = "cache";
cache-level = <2>;
+ qcom,saw = <&saw_l2>;
+ };
+
+ qcom,l2 {
+ qcom,l2-rates = <384000000 1000000000 1200000000>;
+ qcom,l2-cpufreq = <384000000 600000000 1200000000>;
+ qcom,l2-volt = <1100000 1100000 1150000>;
+ qcom,l2-supply = <&smb208_s1a>;
+ };
+ +
+ idle-states { + idle-states {
+ CPU_SPC: spc { + CPU_SPC: spc {
+ compatible = "qcom,idle-state-spc", "arm,idle-state"; + compatible = "qcom,idle-state-spc";
+ status = "disabled"; + status = "disabled";
+ entry-latency-us = <400>; + entry-latency-us = <400>;
+ exit-latency-us = <900>; + exit-latency-us = <900>;
+ min-residency-us = <3000>; + min-residency-us = <3000>;
+ }; + };
};
+ };
- L2: l2-cache {
- compatible = "cache";
- cache-level = <2>;
+ opp_table_l2: opp_table_l2 {
+ compatible = "operating-points-v2";
+
+ opp-384000000 {
+ opp-hz = /bits/ 64 <384000000>;
+ opp-microvolt = <1100000>;
+ clock-latency-ns = <100000>;
+ opp-level = <0>;
+ };
+
+ opp-1000000000 {
+ opp-hz = /bits/ 64 <1000000000>;
+ opp-microvolt = <1100000>;
+ clock-latency-ns = <100000>;
+ opp-level = <1>;
+ };
+
+ opp-1200000000 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <1150000>;
+ clock-latency-ns = <100000>;
+ opp-level = <2>;
+ }; + };
+ }; + };
+ +
@ -72,65 +93,71 @@
+ +
+ opp-384000000 { + opp-384000000 {
+ opp-hz = /bits/ 64 <384000000>; + opp-hz = /bits/ 64 <384000000>;
+ opp-microvolt-speed0-pvs0-v0 = <1000000>; + opp-microvolt-speed0-pvs0-v0 = <995000 1000000 1005000>;
+ opp-microvolt-speed0-pvs1-v0 = <925000>; + opp-microvolt-speed0-pvs1-v0 = <920000 925000 930000>;
+ opp-microvolt-speed0-pvs2-v0 = <875000>; + opp-microvolt-speed0-pvs2-v0 = <870000 875000 880000>;
+ opp-microvolt-speed0-pvs3-v0 = <800000>; + opp-microvolt-speed0-pvs3-v0 = <795000 800000 805000>;
+ opp-supported-hw = <0x1>; + opp-supported-hw = <0x1>;
+ clock-latency-ns = <100000>; + clock-latency-ns = <100000>;
+ opp-level = <0>;
+ }; + };
+ +
+ opp-600000000 { + opp-600000000 {
+ opp-hz = /bits/ 64 <600000000>; + opp-hz = /bits/ 64 <600000000>;
+ opp-microvolt-speed0-pvs0-v0 = <1050000>; + opp-microvolt-speed0-pvs0-v0 = <1045000 1050000 1055000>;
+ opp-microvolt-speed0-pvs1-v0 = <975000>; + opp-microvolt-speed0-pvs1-v0 = <970000 975000 980000>;
+ opp-microvolt-speed0-pvs2-v0 = <925000>; + opp-microvolt-speed0-pvs2-v0 = <920000 925000 930000>;
+ opp-microvolt-speed0-pvs3-v0 = <850000>; + opp-microvolt-speed0-pvs3-v0 = <845000 850000 855000>;
+ opp-supported-hw = <0x1>; + opp-supported-hw = <0x1>;
+ clock-latency-ns = <100000>; + clock-latency-ns = <100000>;
+ opp-level = <1>;
+ }; + };
+ +
+ opp-800000000 { + opp-800000000 {
+ opp-hz = /bits/ 64 <800000000>; + opp-hz = /bits/ 64 <800000000>;
+ opp-microvolt-speed0-pvs0-v0 = <1100000>; + opp-microvolt-speed0-pvs0-v0 = <1095000 1100000 1105000>;
+ opp-microvolt-speed0-pvs1-v0 = <1025000>; + opp-microvolt-speed0-pvs1-v0 = <1020000 1025000 1030000>;
+ opp-microvolt-speed0-pvs2-v0 = <995000>; + opp-microvolt-speed0-pvs2-v0 = <990000 995000 1000000>;
+ opp-microvolt-speed0-pvs3-v0 = <900000>; + opp-microvolt-speed0-pvs3-v0 = <895000 900000 905000>;
+ opp-supported-hw = <0x1>; + opp-supported-hw = <0x1>;
+ clock-latency-ns = <100000>; + clock-latency-ns = <100000>;
+ opp-level = <1>;
+ }; + };
+ +
+ opp-1000000000 { + opp-1000000000 {
+ opp-hz = /bits/ 64 <1000000000>; + opp-hz = /bits/ 64 <1000000000>;
+ opp-microvolt-speed0-pvs0-v0 = <1150000>; + opp-microvolt-speed0-pvs0-v0 = <1145000 1150000 1155000>;
+ opp-microvolt-speed0-pvs1-v0 = <1075000>; + opp-microvolt-speed0-pvs1-v0 = <1070000 1075000 1080000>;
+ opp-microvolt-speed0-pvs2-v0 = <1025000>; + opp-microvolt-speed0-pvs2-v0 = <1020000 1025000 1030000>;
+ opp-microvolt-speed0-pvs3-v0 = <950000>; + opp-microvolt-speed0-pvs3-v0 = <945000 950000 955000>;
+ opp-supported-hw = <0x1>; + opp-supported-hw = <0x1>;
+ clock-latency-ns = <100000>; + clock-latency-ns = <100000>;
+ opp-level = <1>;
+ }; + };
+ +
+ opp-1200000000 { + opp-1200000000 {
+ opp-hz = /bits/ 64 <1200000000>; + opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt-speed0-pvs0-v0 = <1200000>; + opp-microvolt-speed0-pvs0-v0 = <1195000 1200000 1205000>;
+ opp-microvolt-speed0-pvs1-v0 = <1125000>; + opp-microvolt-speed0-pvs1-v0 = <1120000 1125000 1130000>;
+ opp-microvolt-speed0-pvs2-v0 = <1075000>; + opp-microvolt-speed0-pvs2-v0 = <1070000 1075000 1080000>;
+ opp-microvolt-speed0-pvs3-v0 = <1000000>; + opp-microvolt-speed0-pvs3-v0 = <995000 1000000 1005000>;
+ opp-supported-hw = <0x1>; + opp-supported-hw = <0x1>;
+ clock-latency-ns = <100000>; + clock-latency-ns = <100000>;
+ opp-level = <2>;
+ }; + };
+ +
+ opp-1400000000 { + opp-1400000000 {
+ opp-hz = /bits/ 64 <1400000000>; + opp-hz = /bits/ 64 <1400000000>;
+ opp-microvolt-speed0-pvs0-v0 = <1250000>; + opp-microvolt-speed0-pvs0-v0 = <1245000 1250000 1255000>;
+ opp-microvolt-speed0-pvs1-v0 = <1175000>; + opp-microvolt-speed0-pvs1-v0 = <1170000 1175000 1180000>;
+ opp-microvolt-speed0-pvs2-v0 = <1125000>; + opp-microvolt-speed0-pvs2-v0 = <1120000 1125000 1130000>;
+ opp-microvolt-speed0-pvs3-v0 = <1050000>; + opp-microvolt-speed0-pvs3-v0 = <1045000 1050000 1055000>;
+ opp-supported-hw = <0x1>; + opp-supported-hw = <0x1>;
+ clock-latency-ns = <100000>; + clock-latency-ns = <100000>;
+ }; + opp-level = <2>;
+ }; };
+ };
+ thermal-zones { + thermal-zones {
+ tsens_tz_sensor0 { + tsens_tz_sensor0 {
+ polling-delay-passive = <0>; + polling-delay-passive = <0>;
@ -138,28 +165,16 @@
+ thermal-sensors = <&tsens 0>; + thermal-sensors = <&tsens 0>;
+ +
+ trips { + trips {
+ cpu-critical-hi { + cpu-critical {
+ temperature = <125000>;
+ hysteresis = <2000>;
+ type = "critical_high";
+ };
+
+ cpu-config-hi {
+ temperature = <105000>; + temperature = <105000>;
+ hysteresis = <2000>; + hysteresis = <2000>;
+ type = "configurable_hi"; + type = "critical";
+ }; + };
+ +
+ cpu-config-lo { + cpu-hot {
+ temperature = <95000>; + temperature = <95000>;
+ hysteresis = <2000>; + hysteresis = <2000>;
+ type = "configurable_lo"; + type = "hot";
+ };
+
+ cpu-critical-low {
+ temperature = <0>;
+ hysteresis = <2000>;
+ type = "critical_low";
+ }; + };
+ }; + };
+ }; + };
@ -170,28 +185,16 @@
+ thermal-sensors = <&tsens 1>; + thermal-sensors = <&tsens 1>;
+ +
+ trips { + trips {
+ cpu-critical-hi { + cpu-critical {
+ temperature = <125000>;
+ hysteresis = <2000>;
+ type = "critical_high";
+ };
+
+ cpu-config-hi {
+ temperature = <105000>; + temperature = <105000>;
+ hysteresis = <2000>; + hysteresis = <2000>;
+ type = "configurable_hi"; + type = "critical";
+ }; + };
+ +
+ cpu-config-lo { + cpu-hot {
+ temperature = <95000>; + temperature = <95000>;
+ hysteresis = <2000>; + hysteresis = <2000>;
+ type = "configurable_lo"; + type = "hot";
+ };
+
+ cpu-critical-low {
+ temperature = <0>;
+ hysteresis = <2000>;
+ type = "critical_low";
+ }; + };
+ }; + };
+ }; + };
@ -202,28 +205,16 @@
+ thermal-sensors = <&tsens 2>; + thermal-sensors = <&tsens 2>;
+ +
+ trips { + trips {
+ cpu-critical-hi { + cpu-critical {
+ temperature = <125000>;
+ hysteresis = <2000>;
+ type = "critical_high";
+ };
+
+ cpu-config-hi {
+ temperature = <105000>; + temperature = <105000>;
+ hysteresis = <2000>; + hysteresis = <2000>;
+ type = "configurable_hi"; + type = "critical";
+ }; + };
+ +
+ cpu-config-lo { + cpu-hot {
+ temperature = <95000>; + temperature = <95000>;
+ hysteresis = <2000>; + hysteresis = <2000>;
+ type = "configurable_lo"; + type = "hot";
+ };
+
+ cpu-critical-low {
+ temperature = <0>;
+ hysteresis = <2000>;
+ type = "critical_low";
+ }; + };
+ }; + };
+ }; + };
@ -234,28 +225,16 @@
+ thermal-sensors = <&tsens 3>; + thermal-sensors = <&tsens 3>;
+ +
+ trips { + trips {
+ cpu-critical-hi { + cpu-critical {
+ temperature = <125000>;
+ hysteresis = <2000>;
+ type = "critical_high";
+ };
+
+ cpu-config-hi {
+ temperature = <105000>; + temperature = <105000>;
+ hysteresis = <2000>; + hysteresis = <2000>;
+ type = "configurable_hi"; + type = "critical";
+ }; + };
+ +
+ cpu-config-lo { + cpu-hot {
+ temperature = <95000>; + temperature = <95000>;
+ hysteresis = <2000>; + hysteresis = <2000>;
+ type = "configurable_lo"; + type = "hot";
+ };
+
+ cpu-critical-low {
+ temperature = <0>;
+ hysteresis = <2000>;
+ type = "critical_low";
+ }; + };
+ }; + };
+ }; + };
@ -266,28 +245,16 @@
+ thermal-sensors = <&tsens 4>; + thermal-sensors = <&tsens 4>;
+ +
+ trips { + trips {
+ cpu-critical-hi { + cpu-critical {
+ temperature = <125000>;
+ hysteresis = <2000>;
+ type = "critical_high";
+ };
+
+ cpu-config-hi {
+ temperature = <105000>; + temperature = <105000>;
+ hysteresis = <2000>; + hysteresis = <2000>;
+ type = "configurable_hi"; + type = "critical";
+ }; + };
+ +
+ cpu-config-lo { + cpu-hot {
+ temperature = <95000>; + temperature = <95000>;
+ hysteresis = <2000>; + hysteresis = <2000>;
+ type = "configurable_lo"; + type = "hot";
+ };
+
+ cpu-critical-low {
+ temperature = <0>;
+ hysteresis = <2000>;
+ type = "critical_low";
+ }; + };
+ }; + };
+ }; + };
@ -298,28 +265,16 @@
+ thermal-sensors = <&tsens 5>; + thermal-sensors = <&tsens 5>;
+ +
+ trips { + trips {
+ cpu-critical-hi { + cpu-critical {
+ temperature = <125000>;
+ hysteresis = <2000>;
+ type = "critical_high";
+ };
+
+ cpu-config-hi {
+ temperature = <105000>; + temperature = <105000>;
+ hysteresis = <2000>; + hysteresis = <2000>;
+ type = "configurable_hi"; + type = "critical";
+ }; + };
+ +
+ cpu-config-lo { + cpu-hot {
+ temperature = <95000>; + temperature = <95000>;
+ hysteresis = <2000>; + hysteresis = <2000>;
+ type = "configurable_lo"; + type = "hot";
+ };
+
+ cpu-critical-low {
+ temperature = <0>;
+ hysteresis = <2000>;
+ type = "critical_low";
+ }; + };
+ }; + };
+ }; + };
@ -330,28 +285,16 @@
+ thermal-sensors = <&tsens 6>; + thermal-sensors = <&tsens 6>;
+ +
+ trips { + trips {
+ cpu-critical-hi { + cpu-critical {
+ temperature = <125000>;
+ hysteresis = <2000>;
+ type = "critical_high";
+ };
+
+ cpu-config-hi {
+ temperature = <105000>; + temperature = <105000>;
+ hysteresis = <2000>; + hysteresis = <2000>;
+ type = "configurable_hi"; + type = "critical";
+ }; + };
+ +
+ cpu-config-lo { + cpu-hot {
+ temperature = <95000>; + temperature = <95000>;
+ hysteresis = <2000>; + hysteresis = <2000>;
+ type = "configurable_lo"; + type = "hot";
+ };
+
+ cpu-critical-low {
+ temperature = <0>;
+ hysteresis = <2000>;
+ type = "critical_low";
+ }; + };
+ }; + };
+ }; + };
@ -362,28 +305,16 @@
+ thermal-sensors = <&tsens 7>; + thermal-sensors = <&tsens 7>;
+ +
+ trips { + trips {
+ cpu-critical-hi { + cpu-critical {
+ temperature = <125000>;
+ hysteresis = <2000>;
+ type = "critical_high";
+ };
+
+ cpu-config-hi {
+ temperature = <105000>; + temperature = <105000>;
+ hysteresis = <2000>; + hysteresis = <2000>;
+ type = "configurable_hi"; + type = "critical";
+ }; + };
+ +
+ cpu-config-lo { + cpu-hot {
+ temperature = <95000>; + temperature = <95000>;
+ hysteresis = <2000>; + hysteresis = <2000>;
+ type = "configurable_lo"; + type = "hot";
+ };
+
+ cpu-critical-low {
+ temperature = <0>;
+ hysteresis = <2000>;
+ type = "critical_low";
+ }; + };
+ }; + };
+ }; + };
@ -394,28 +325,16 @@
+ thermal-sensors = <&tsens 8>; + thermal-sensors = <&tsens 8>;
+ +
+ trips { + trips {
+ cpu-critical-hi { + cpu-critical {
+ temperature = <125000>;
+ hysteresis = <2000>;
+ type = "critical_high";
+ };
+
+ cpu-config-hi {
+ temperature = <105000>; + temperature = <105000>;
+ hysteresis = <2000>; + hysteresis = <2000>;
+ type = "configurable_hi"; + type = "critical";
+ }; + };
+ +
+ cpu-config-lo { + cpu-hot {
+ temperature = <95000>; + temperature = <95000>;
+ hysteresis = <2000>; + hysteresis = <2000>;
+ type = "configurable_lo"; + type = "hot";
+ };
+
+ cpu-critical-low {
+ temperature = <0>;
+ hysteresis = <2000>;
+ type = "critical_low";
+ }; + };
+ }; + };
+ }; + };
@ -426,28 +345,16 @@
+ thermal-sensors = <&tsens 9>; + thermal-sensors = <&tsens 9>;
+ +
+ trips { + trips {
+ cpu-critical-hi { + cpu-critical {
+ temperature = <125000>;
+ hysteresis = <2000>;
+ type = "critical_high";
+ };
+
+ cpu-config-hi {
+ temperature = <105000>; + temperature = <105000>;
+ hysteresis = <2000>; + hysteresis = <2000>;
+ type = "configurable_hi"; + type = "critical";
+ }; + };
+ +
+ cpu-config-lo { + cpu-hot {
+ temperature = <95000>; + temperature = <95000>;
+ hysteresis = <2000>; + hysteresis = <2000>;
+ type = "configurable_lo"; + type = "hot";
+ };
+
+ cpu-critical-low {
+ temperature = <0>;
+ hysteresis = <2000>;
+ type = "critical_low";
+ }; + };
+ }; + };
+ }; + };
@ -458,33 +365,24 @@
+ thermal-sensors = <&tsens 10>; + thermal-sensors = <&tsens 10>;
+ +
+ trips { + trips {
+ cpu-critical-hi { + cpu-critical {
+ temperature = <125000>;
+ hysteresis = <2000>;
+ type = "critical_high";
+ };
+
+ cpu-config-hi {
+ temperature = <105000>; + temperature = <105000>;
+ hysteresis = <2000>; + hysteresis = <2000>;
+ type = "configurable_hi"; + type = "critical";
+ }; + };
+ +
+ cpu-config-lo { + cpu-hot {
+ temperature = <95000>; + temperature = <95000>;
+ hysteresis = <2000>; + hysteresis = <2000>;
+ type = "configurable_lo"; + type = "hot";
+ };
+
+ cpu-critical-low {
+ temperature = <0>;
+ hysteresis = <2000>;
+ type = "critical_low";
+ }; + };
+ }; + };
}; + };
}; + };
+
memory {
device_type = "memory";
reg = <0x0 0x0>;
@@ -93,6 +552,15 @@ @@ -93,6 +552,15 @@
}; };
}; };
@ -501,25 +399,19 @@
firmware { firmware {
scm { scm {
compatible = "qcom,scm-ipq806x", "qcom,scm"; compatible = "qcom,scm-ipq806x", "qcom,scm";
@@ -120,6 +588,84 @@ @@ -120,6 +588,78 @@
reg-names = "lpass-lpaif"; reg-names = "lpass-lpaif";
}; };
+ qfprom: qfprom@700000 { + L2: l2-cache {
+ compatible = "qcom,qfprom", "syscon"; + compatible = "qcom,krait-cache", "cache";
+ reg = <0x700000 0x1000>; + cache-level = <2>;
+ #address-cells = <1>; + qcom,saw = <&saw_l2>;
+ #size-cells = <1>; +
+ status = "okay"; + clocks = <&kraitcc 4>;
+ tsens_calib: calib@400 { + clock-names = "l2";
+ reg = <0x400 0xb>; + l2-supply = <&smb208_s1a>;
+ }; + operating-points-v2 = <&opp_table_l2>;
+ tsens_backup: backup@410 {
+ reg = <0x410 0xb>;
+ };
+ speedbin_efuse: speedbin@0c0 {
+ reg = <0x0c0 0x4>;
+ };
+ }; + };
+ +
+ rpm: rpm@108000 { + rpm: rpm@108000 {
@ -692,22 +584,6 @@
gsbi2: gsbi@12480000 { gsbi2: gsbi@12480000 {
compatible = "qcom,gsbi-v1.0.0"; compatible = "qcom,gsbi-v1.0.0";
cell-index = <2>; cell-index = <2>;
@@ -436,6 +1060,15 @@
#power-domain-cells = <1>;
};
+ tsens: thermal-sensor@900000 {
+ compatible = "qcom,ipq8064-tsens";
+ reg = <0x900000 0x3680>;
+ nvmem-cells = <&tsens_calib>, <&tsens_backup>;
+ nvmem-cell-names = "calib", "calib_backup";
+ interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
+ #thermal-sensor-cells = <1>;
+ };
+
tcsr: syscon@1a400000 {
compatible = "qcom,tcsr-ipq8064", "syscon";
reg = <0x1a400000 0x100>;
@@ -448,6 +1081,95 @@ @@ -448,6 +1081,95 @@
#reset-cells = <1>; #reset-cells = <1>;
}; };
@ -804,7 +680,7 @@
pcie0: pci@1b500000 { pcie0: pci@1b500000 {
compatible = "qcom,pcie-ipq8064"; compatible = "qcom,pcie-ipq8064";
reg = <0x1b500000 0x1000 reg = <0x1b500000 0x1000
@@ -601,6 +1323,167 @@ @@ -601,6 +1323,59 @@
perst-gpio = <&qcom_pinmux 63 GPIO_ACTIVE_LOW>; perst-gpio = <&qcom_pinmux 63 GPIO_ACTIVE_LOW>;
}; };
@ -847,22 +723,6 @@
+ #size-cells = <0>; + #size-cells = <0>;
+ }; + };
+ +
+ nss_common: syscon@03000000 {
+ compatible = "syscon";
+ reg = <0x03000000 0x0000FFFF>;
+ };
+
+ qsgmii_csr: syscon@1bb00000 {
+ compatible = "syscon";
+ reg = <0x1bb00000 0x000001FF>;
+ };
+
+ stmmac_axi_setup: stmmac-axi-config {
+ snps,wr_osr_lmt = <7>;
+ snps,rd_osr_lmt = <7>;
+ snps,blen = <16 0 0 0 0 0 0>;
+ };
+
+ mdio0: mdio@37000000 { + mdio0: mdio@37000000 {
+ #address-cells = <1>; + #address-cells = <1>;
+ #size-cells = <0>; + #size-cells = <0>;
@ -876,98 +736,6 @@
+ +
+ status = "disabled"; + status = "disabled";
+ }; + };
+
+ gmac0: ethernet@37000000 {
+ device_type = "network";
+ compatible = "qcom,ipq806x-gmac";
+ reg = <0x37000000 0x200000>;
+ interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "macirq";
+
+ snps,axi-config = <&stmmac_axi_setup>;
+ snps,pbl = <32>;
+ snps,aal = <1>;
+
+ qcom,nss-common = <&nss_common>;
+ qcom,qsgmii-csr = <&qsgmii_csr>;
+
+ clocks = <&gcc GMAC_CORE1_CLK>;
+ clock-names = "stmmaceth";
+
+ resets = <&gcc GMAC_CORE1_RESET>;
+ reset-names = "stmmaceth";
+
+ status = "disabled";
+ };
+
+ gmac1: ethernet@37200000 {
+ device_type = "network";
+ compatible = "qcom,ipq806x-gmac";
+ reg = <0x37200000 0x200000>;
+ interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "macirq";
+
+ snps,axi-config = <&stmmac_axi_setup>;
+ snps,pbl = <32>;
+ snps,aal = <1>;
+
+ qcom,nss-common = <&nss_common>;
+ qcom,qsgmii-csr = <&qsgmii_csr>;
+
+ clocks = <&gcc GMAC_CORE2_CLK>;
+ clock-names = "stmmaceth";
+
+ resets = <&gcc GMAC_CORE2_RESET>;
+ reset-names = "stmmaceth";
+
+ status = "disabled";
+ };
+
+ gmac2: ethernet@37400000 {
+ device_type = "network";
+ compatible = "qcom,ipq806x-gmac", "snps,dwmac";
+ reg = <0x37400000 0x200000>;
+ interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "macirq";
+
+ snps,axi-config = <&stmmac_axi_setup>;
+ snps,pbl = <32>;
+ snps,aal = <1>;
+
+ qcom,nss-common = <&nss_common>;
+ qcom,qsgmii-csr = <&qsgmii_csr>;
+
+ clocks = <&gcc GMAC_CORE3_CLK>;
+ clock-names = "stmmaceth";
+
+ resets = <&gcc GMAC_CORE3_RESET>;
+ reset-names = "stmmaceth";
+
+ status = "disabled";
+ };
+
+ gmac3: ethernet@37600000 {
+ device_type = "network";
+ compatible = "qcom,ipq806x-gmac", "snps,dwmac";
+ reg = <0x37600000 0x200000>;
+ interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "macirq";
+
+ snps,axi-config = <&stmmac_axi_setup>;
+ snps,pbl = <32>;
+ snps,aal = <1>;
+
+ qcom,nss-common = <&nss_common>;
+ qcom,qsgmii-csr = <&qsgmii_csr>;
+
+ clocks = <&gcc GMAC_CORE4_CLK>;
+ clock-names = "stmmaceth";
+
+ resets = <&gcc GMAC_CORE4_RESET>;
+ reset-names = "stmmaceth";
+
+ status = "disabled";
+ };
+ +
vsdcc_fixed: vsdcc-regulator { vsdcc_fixed: vsdcc-regulator {
compatible = "regulator-fixed"; compatible = "regulator-fixed";

View File

@ -0,0 +1,147 @@
diff --git a/qcom-ipq8064-rb3011.dts.orig b/qcom-ipq8064-rb3011.dts
index 282b89ce3d..4faaa95b33 100644
--- a/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts
+++ b/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts
@@ -24,73 +24,6 @@ memory@0 {
device_type = "memory";
};
- mdio0: mdio@0 {
- status = "okay";
- compatible = "virtual,mdio-gpio";
- gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
- <&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- pinctrl-0 = <&mdio0_pins>;
- pinctrl-names = "default";
-
- switch0: switch@10 {
- compatible = "qca,qca8337";
- #address-cells = <1>;
- #size-cells = <0>;
-
- dsa,member = <0 0>;
-
- pinctrl-0 = <&sw0_reset_pin>;
- pinctrl-names = "default";
-
- reset-gpios = <&qcom_pinmux 16 GPIO_ACTIVE_LOW>;
- reg = <0x10>;
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- switch0cpu: port@0 {
- reg = <0>;
- label = "cpu";
- ethernet = <&gmac0>;
- phy-mode = "rgmii-id";
- fixed-link {
- speed = <1000>;
- full-duplex;
- };
- };
-
- port@1 {
- reg = <1>;
- label = "sw1";
- };
-
- port@2 {
- reg = <2>;
- label = "sw2";
- };
-
- port@3 {
- reg = <3>;
- label = "sw3";
- };
-
- port@4 {
- reg = <4>;
- label = "sw4";
- };
-
- port@5 {
- reg = <5>;
- label = "sw5";
- };
- };
- };
- };
-
mdio1: mdio@1 {
status = "okay";
compatible = "virtual,mdio-gpio";
@@ -216,6 +149,68 @@ led@7 {
};
};
+&mdio0 {
+ status = "okay";
+
+ pinctrl-0 = <&mdio0_pins>;
+ pinctrl-names = "default";
+
+ switch0: switch@10 {
+ compatible = "qca,qca8337";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ dsa,member = <0 0>;
+
+ pinctrl-0 = <&sw0_reset_pin>;
+ pinctrl-names = "default";
+
+ reset-gpios = <&qcom_pinmux 16 GPIO_ACTIVE_LOW>;
+ reg = <0x10>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ switch0cpu: port@0 {
+ reg = <0>;
+ label = "cpu";
+ ethernet = <&gmac0>;
+ phy-mode = "rgmii-id";
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "sw1";
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "sw2";
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "sw3";
+ };
+
+ port@4 {
+ reg = <4>;
+ label = "sw4";
+ };
+
+ port@5 {
+ reg = <5>;
+ label = "sw5";
+ };
+ };
+ };
+};
+
&gmac0 {
status = "okay";