mediatek: change dts to use the new snand driver

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
This commit is contained in:
Chuanhong Guo 2021-08-24 12:04:51 +08:00
parent c6ed31630d
commit 01b452fe2d
7 changed files with 160 additions and 245 deletions

View File

@ -430,10 +430,6 @@
}; };
}; };
&bch {
status = "okay";
};
&btif { &btif {
status = "disabled"; status = "disabled";
}; };
@ -501,18 +497,12 @@
status = "okay"; status = "okay";
}; };
&snfi { &snand {
mediatek,quad-spi;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&serial_nand_pins>; pinctrl-0 = <&serial_nand_pins>;
status = "okay"; status = "okay";
spi_nand@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-nand";
spi-max-frequency = <104000000>;
reg = <0>;
partitions { partitions {
compatible = "fixed-partitions"; compatible = "fixed-partitions";
#address-cells = <1>; #address-cells = <1>;
@ -559,7 +549,6 @@
}; };
}; };
}; };
};
&spi0 { &spi0 {
pinctrl-names = "default"; pinctrl-names = "default";

View File

@ -110,10 +110,6 @@
}; };
}; };
&bch {
status = "okay";
};
&btif { &btif {
status = "okay"; status = "okay";
}; };
@ -342,18 +338,11 @@
}; };
}; };
&snfi { &snand {
mediatek,quad-spi;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&serial_nand_pins>; pinctrl-0 = <&serial_nand_pins>;
status = "okay"; status = "okay";
snand: spi_nand@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-nand";
spi-max-frequency = <104000000>;
reg = <0>;
};
}; };
&spi0 { &spi0 {

View File

@ -6,18 +6,7 @@
compatible = "mediatek,mt7622,ubi"; compatible = "mediatek,mt7622,ubi";
}; };
&snfi { &snand {
pinctrl-names = "default";
pinctrl-0 = <&serial_nand_pins>;
status = "okay";
spi_nand@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-nand";
spi-max-frequency = <104000000>;
reg = <0>;
partitions { partitions {
compatible = "fixed-partitions"; compatible = "fixed-partitions";
#address-cells = <1>; #address-cells = <1>;
@ -65,4 +54,3 @@
}; };
}; };
}; };
};

View File

@ -1,35 +1,17 @@
--- a/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts --- a/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts +++ b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
@@ -114,7 +114,7 @@ @@ -259,14 +259,32 @@
};
&bch {
- status = "disabled";
+ status = "okay";
};
&btif {
@@ -259,14 +259,40 @@
status = "disabled"; status = "disabled";
}; };
-&nor_flash { -&nor_flash {
+&snfi { +&snand {
pinctrl-names = "default"; pinctrl-names = "default";
- pinctrl-0 = <&spi_nor_pins>; - pinctrl-0 = <&spi_nor_pins>;
- status = "disabled"; - status = "disabled";
+ pinctrl-0 = <&serial_nand_pins>; + pinctrl-0 = <&serial_nand_pins>;
+ mediatek,quad-spi;
+ status = "okay"; + status = "okay";
- flash@0 {
- compatible = "jedec,spi-nor";
+ snand: spi_nand@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "spi-nand";
+ spi-max-frequency = <104000000>;
reg = <0>;
+
+ partitions { + partitions {
+ compatible = "fixed-partitions"; + compatible = "fixed-partitions";
+ #address-cells = <1>; + #address-cells = <1>;
@ -46,11 +28,13 @@
+ reg = <0x80000 0x200000>; + reg = <0x80000 0x200000>;
+ read-only; + read-only;
+ }; + };
+
- flash@0 {
- compatible = "jedec,spi-nor";
- reg = <0>;
+ partition@280000 { + partition@280000 {
+ label = "ubi"; + label = "ubi";
+ reg = <0x280000 0x7d80000>; + reg = <0x280000 0x7d80000>;
+ };
+ }; + };
}; };
}; };

View File

@ -11,27 +11,21 @@ Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
--- a/arch/arm/boot/dts/mt7629.dtsi --- a/arch/arm/boot/dts/mt7629.dtsi
+++ b/arch/arm/boot/dts/mt7629.dtsi +++ b/arch/arm/boot/dts/mt7629.dtsi
@@ -272,6 +272,28 @@ @@ -272,6 +272,22 @@
status = "disabled"; status = "disabled";
}; };
+ bch: ecc@1100e000 { + snand: snfi@1100d000 {
+ compatible = "mediatek,mt7622-ecc"; + pinctrl-names = "default";
+ reg = <0x1100e000 0x1000>; + pinctrl-0 = <&serial_nand_pins>;
+ interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_LOW>; + compatible = "mediatek,mt7629-snand";
+ clocks = <&pericfg CLK_PERI_NFIECC_PD>; + reg = <0x1100d000 0x1000>, <0x1100e000 0x1000>;
+ clock-names = "nfiecc_clk"; + reg-names = "nfi", "ecc";
+ status = "disabled";
+ };
+
+ snfi: spi@1100d000 {
+ compatible = "mediatek,mt7629-snfi";
+ reg = <0x1100d000 0x1000>;
+ interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>; + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&pericfg CLK_PERI_NFI_PD>, + clocks = <&pericfg CLK_PERI_NFI_PD>,
+ <&pericfg CLK_PERI_SNFI_PD>; + <&pericfg CLK_PERI_SNFI_PD>,
+ clock-names = "nfi_clk", "spi_clk"; + <&pericfg CLK_PERI_NFIECC_PD>;
+ ecc-engine = <&bch>; + clock-names = "nfi_clk", "pad_clk", "ecc_clk";
+ #address-cells = <1>; + #address-cells = <1>;
+ #size-cells = <0>; + #size-cells = <0>;
+ status = "disabled"; + status = "disabled";
@ -42,25 +36,13 @@ Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
"mediatek,mt7622-spi"; "mediatek,mt7622-spi";
--- a/arch/arm/boot/dts/mt7629-rfb.dts --- a/arch/arm/boot/dts/mt7629-rfb.dts
+++ b/arch/arm/boot/dts/mt7629-rfb.dts +++ b/arch/arm/boot/dts/mt7629-rfb.dts
@@ -254,6 +254,52 @@ @@ -254,6 +254,38 @@
}; };
}; };
+&bch { +&snand {
+ status = "okay"; + status = "okay";
+}; + mediatek,quad-spi;
+
+&snfi {
+ pinctrl-names = "default";
+ pinctrl-0 = <&serial_nand_pins>;
+ status = "okay";
+
+ spi_nand@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "spi-nand";
+ spi-max-frequency = <104000000>;
+ reg = <0>;
+ +
+ partitions { + partitions {
+ compatible = "fixed-partitions"; + compatible = "fixed-partitions";
@ -87,8 +69,6 @@ Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
+ label = "firmware"; + label = "firmware";
+ reg = <0x1c0000 0x1000000>; + reg = <0x1c0000 0x1000000>;
+ }; + };
+
+ };
+ }; + };
+}; +};
+ +

View File

@ -1,17 +1,18 @@
--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi --- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
@@ -561,6 +561,19 @@ @@ -561,6 +561,20 @@
status = "disabled"; status = "disabled";
}; };
+ snfi: spi@1100d000 { + snand: snfi@1100d000 {
+ compatible = "mediatek,mt7622-snfi"; + compatible = "mediatek,mt7622-snand";
+ reg = <0 0x1100d000 0 0x1000>; + reg = <0 0x1100d000 0 0x1000>, <0 0x1100e000 0 0x1000>;
+ reg-names = "nfi", "ecc";
+ interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>; + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&pericfg CLK_PERI_NFI_PD>, + clocks = <&pericfg CLK_PERI_NFI_PD>,
+ <&pericfg CLK_PERI_SNFI_PD>; + <&pericfg CLK_PERI_SNFI_PD>,
+ clock-names = "nfi_clk", "spi_clk"; + <&pericfg CLK_PERI_NFIECC_PD>;
+ ecc-engine = <&bch>; + clock-names = "nfi_clk", "pad_clk", "ecc_clk";
+ #address-cells = <1>; + #address-cells = <1>;
+ #size-cells = <0>; + #size-cells = <0>;
+ status = "disabled"; + status = "disabled";
@ -22,31 +23,16 @@
"mediatek,mt8173-nor"; "mediatek,mt8173-nor";
--- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts --- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts +++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
@@ -85,7 +85,7 @@ @@ -529,6 +529,55 @@
};
&bch {
- status = "disabled";
+ status = "okay";
};
&btif {
@@ -529,6 +529,62 @@
status = "disabled"; status = "disabled";
}; };
+&snfi { +&snand {
+ mediatek,quad-spi;
+ pinctrl-names = "default"; + pinctrl-names = "default";
+ pinctrl-0 = <&serial_nand_pins>; + pinctrl-0 = <&serial_nand_pins>;
+ status = "okay"; + status = "okay";
+ +
+ spi_nand@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "spi-nand";
+ spi-max-frequency = <104000000>;
+ reg = <0>;
+
+ partitions { + partitions {
+ compatible = "fixed-partitions"; + compatible = "fixed-partitions";
+ #address-cells = <1>; + #address-cells = <1>;
@ -89,7 +75,6 @@
+ }; + };
+ }; + };
+}; +};
+};
+ +
&spi0 { &spi0 {
pinctrl-names = "default"; pinctrl-names = "default";

View File

@ -1,6 +1,6 @@
--- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts --- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts +++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
@@ -567,7 +567,7 @@ @@ -561,7 +561,7 @@
reg = <0x140000 0x0080000>; reg = <0x140000 0x0080000>;
}; };
@ -9,7 +9,7 @@
label = "Factory"; label = "Factory";
reg = <0x1c0000 0x0100000>; reg = <0x1c0000 0x0100000>;
}; };
@@ -626,5 +626,6 @@ @@ -619,5 +619,6 @@
}; };
&wmac { &wmac {