1
0
mirror of https://git.openwrt.org/openwrt/openwrt.git synced 2024-06-13 10:49:13 +02:00
openwrt/target/linux/ath79/files/include/mfd/rb4xx-cpld.h
Christopher Hill fa70b3a4bb ath79: add Mikrotik rb4xx series drivers
This adds 3 Mikrotik rb4xx series drivers as follows:

rb4xx-cpld: This is in the mfd subsystem, and is the parent CPLD device
that interfaces between the SoC SPI bus and its two children below.
rb4xx-gpio: This is the GPIO expander.
rb4xx-nand: This is the NAND driver.

The history of this code comes in three phases.

1. The first is a May 2015 attempt to push the equivalient ar71xx rb4xx
drivers upstream. See https://lore.kernel.org/patchwork/patch/940880/.

Module-author: Gabor Juhos <juhosg@openwrt.org>
Module-author: Imre Kaloz <kaloz@openwrt.org>
Module-author: Bert Vermeulen <bert@biot.com>

2. Next several ar71xx patches were applied bringing the code current.

commit 7bbf4117c6
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>

commit af79fdbe4a
commit 889272d92d
commit e21cb649a2
commit 7c09fa4a74
Signed-off-by: Felix Fietkau <nbd@nbd.name>

3. Finally a heavy refactor to split the driver into the three new
subsystems, and updated to work with the device tree configuration, plus
updates and review feedback incorporated

Reviewed-by: Thibaut VARÈNE <hacks@slashdirt.org>
Signed-off-by: Christopher Hill <ch6574@gmail.com>
2020-06-15 21:16:18 +02:00

26 lines
813 B
C

// SPDX-License-Identifier: GPL-2.0-only
/*
* CPLD driver for the MikroTik RouterBoard 4xx series
*
* Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
* Copyright (C) 2015 Bert Vermeulen <bert@biot.com>
* Copyright (C) 2020 Christopher Hill <ch6574@gmail.com>
*
* This file was based on the driver for Linux 2.6.22 published by
* MikroTik for their RouterBoard 4xx series devices.
*/
#include <linux/spi/spi.h>
struct rb4xx_cpld {
struct spi_device *spi;
int (*write_nand)(struct rb4xx_cpld *self, const void *tx_buf,
unsigned int len);
int (*read_nand)(struct rb4xx_cpld *self, void *rx_buf,
unsigned int len);
int (*gpio_set_0_7)(struct rb4xx_cpld *self, u8 values);
int (*gpio_set_8)(struct rb4xx_cpld *self, u8 value);
};