309 lines
4.7 KiB
Plaintext
309 lines
4.7 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/dts-v1/;
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#include "ipq8074.dtsi"
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#include "ipq8074-hk-cpu.dtsi"
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#include "ipq8074-ess.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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/ {
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model = "prpl Foundation Haze";
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compatible = "prpl,haze", "qcom,ipq8074";
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aliases {
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serial0 = &blsp1_uart5;
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/* Aliases are required by U-Boot to patch MAC addresses */
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ethernet0 = &dp6_syn;
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ethernet1 = &dp4;
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ethernet2 = &dp3;
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ethernet3 = &dp2;
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label-mac-device = &dp6_syn;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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keys {
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compatible = "gpio-keys";
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pinctrl-0 = <&button_pins>;
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pinctrl-names = "default";
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wps-button {
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label = "wps";
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gpios = <&tlmm 42 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_WPS_BUTTON>;
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};
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reset-button {
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label = "reset";
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gpios = <&tlmm 44 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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};
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};
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&tlmm {
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mdio_pins: mdio-state {
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mdc-pins {
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pins = "gpio68";
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function = "mdc";
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drive-strength = <8>;
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bias-pull-up;
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};
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mdio-pins {
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pins = "gpio69";
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function = "mdio";
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drive-strength = <8>;
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bias-pull-up;
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};
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};
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button_pins: button-state {
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wps-pins {
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pins = "gpio42";
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function = "gpio";
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drive-strength = <8>;
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bias-pull-up;
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};
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rst-pins {
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pins = "gpio44";
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function = "gpio";
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drive-strength = <8>;
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bias-pull-up;
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};
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};
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};
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&blsp1_uart5 {
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status = "okay";
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};
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&prng {
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status = "okay";
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};
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&ssphy_0 {
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status = "okay";
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};
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&qusb_phy_0 {
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status = "okay";
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};
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&ssphy_1 {
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status = "okay";
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};
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&qusb_phy_1 {
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status = "okay";
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};
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&usb_0 {
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status = "okay";
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};
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&usb_1 {
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status = "okay";
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};
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&cryptobam {
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status = "okay";
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};
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&crypto {
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status = "okay";
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};
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&qpic_bam {
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status = "okay";
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};
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&blsp1_spi1 { /* BLSP1 QUP1 */
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pinctrl-0 = <&spi_0_pins>;
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pinctrl-names = "default";
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cs-gpios = <0>;
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status = "okay";
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flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0>;
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compatible = "jedec,spi-nor";
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spi-max-frequency = <50000000>;
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partitions {
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compatible = "qcom,smem-part";
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};
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};
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};
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&mdio {
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status = "okay";
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pinctrl-0 = <&mdio_pins>;
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pinctrl-names = "default";
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reset-gpios = <&tlmm 22 GPIO_ACTIVE_LOW>;
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qca8075_1: ethernet-phy@0 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <0>;
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};
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qca8075_2: ethernet-phy@1 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <1>;
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};
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qca8075_3: ethernet-phy@2 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <2>;
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};
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qca8075_4: ethernet-phy@3 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <3>;
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};
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aqr113c: ethernet-phy@5 {
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compatible ="ethernet-phy-ieee802.3-c45";
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reg = <8>;
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reset-gpios = <&tlmm 43 GPIO_ACTIVE_LOW>;
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};
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};
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&sdhc_1 {
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status = "okay";
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vqmmc-supply = <&l11>;
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};
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&switch {
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status = "okay";
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switch_cpu_bmp = <0x1>; /* cpu port bitmap */
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switch_lan_bmp = <0x1e>; /* lan port bitmap */
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switch_wan_bmp = <0x60>; /* wan port bitmap */
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switch_mac_mode = <0x0>; /* mac mode for uniphy instance0*/
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switch_mac_mode1 = <0xe>; /* mac mode for uniphy instance1*/
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switch_mac_mode2 = <0xd>; /* mac mode for uniphy instance2*/
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bm_tick_mode = <0>; /* bm tick mode */
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tm_tick_mode = <0>; /* tm tick mode */
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qcom,port_phyinfo {
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port@0 {
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port_id = <1>;
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phy_address = <0>;
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};
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port@1 {
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port_id = <2>;
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phy_address = <1>;
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};
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port@2 {
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port_id = <3>;
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phy_address = <2>;
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};
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port@3 {
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port_id = <4>;
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phy_address = <3>;
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};
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port@4 {
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port_id = <6>;
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phy_address = <8>;
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compatible = "ethernet-phy-ieee802.3-c45";
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ethernet-phy-ieee802.3-c45;
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};
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};
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};
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&edma {
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status = "okay";
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};
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/* Dummy LAN port */
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&dp1 {
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status = "disabled";
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phy-handle = <&qca8075_1>;
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label = "lan4";
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};
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&dp2 {
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status = "okay";
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phy-handle = <&qca8075_2>;
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label = "lan3";
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};
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&dp3 {
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status = "okay";
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phy-handle = <&qca8075_3>;
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label = "lan2";
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};
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&dp4 {
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status = "okay";
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phy-handle = <&qca8075_4>;
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label = "lan1";
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};
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&dp6_syn {
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status = "okay";
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qcom,mactype = <1>;
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phy-handle = <&aqr113c>;
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label = "wan";
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};
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&pcie_qmp0 {
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status = "okay";
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};
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&pcie0 {
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status = "okay";
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perst-gpio = <&tlmm 58 GPIO_ACTIVE_LOW>;
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bridge@0,0 {
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reg = <0x00020000 0 0 0 0>;
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#address-cells = <3>;
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#size-cells = <2>;
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ranges;
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};
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};
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&pcie_qmp1 {
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status = "okay";
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};
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&pcie1 {
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status = "okay";
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perst-gpio = <&tlmm 61 GPIO_ACTIVE_LOW>;
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bridge@1,0 {
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reg = <0x00010000 0 0 0 0>;
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#address-cells = <3>;
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#size-cells = <2>;
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ranges;
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wifi@1,0 {
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status = "okay";
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/* ath11k has no DT compatible for PCI cards */
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compatible = "pci17cb,1104";
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reg = <0x00010000 0 0 0 0>;
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qcom,ath11k-calibration-variant = "prpl-Haze";
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};
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};
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};
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&wifi {
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status = "okay";
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qcom,ath11k-calibration-variant = "prpl-Haze";
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};
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