53 lines
2.0 KiB
Diff
53 lines
2.0 KiB
Diff
From feeef118fda562cf9081edef8ad464d89db070f4 Mon Sep 17 00:00:00 2001
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From: Robert Marko <robimarko@gmail.com>
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Date: Tue, 27 Sep 2022 22:12:18 +0200
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Subject: [PATCH] arm64: dts: qcom: ipq6018: move ARMv8 timer out of SoC node
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The ARM timer is usually considered not part of SoC node, just like
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other ARM designed blocks (PMU, PSCI). This fixes dtbs_check warning:
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arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dtb: soc: timer: {'compatible': ['arm,armv8-timer'], 'interrupts': [[1, 2, 3848], [1, 3, 3848], [1, 4, 3848], [1, 1, 3848]]} should not be valid under {'type': 'object'}
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From schema: dtschema/schemas/simple-bus.yaml
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Signed-off-by: Robert Marko <robimarko@gmail.com>
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Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
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Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Link: https://lore.kernel.org/r/20220927201218.1264506-2-robimarko@gmail.com
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---
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arch/arm64/boot/dts/qcom/ipq6018.dtsi | 16 ++++++++--------
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1 file changed, 8 insertions(+), 8 deletions(-)
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--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
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+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
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@@ -510,14 +510,6 @@
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clock-names = "xo";
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};
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- timer {
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- compatible = "arm,armv8-timer";
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- interrupts = <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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- <GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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- <GIC_PPI 4 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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- <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
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- };
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-
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timer@b120000 {
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#address-cells = <1>;
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#size-cells = <1>;
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@@ -769,6 +761,14 @@
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};
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};
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+ timer {
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+ compatible = "arm,armv8-timer";
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+ interrupts = <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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+ <GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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+ <GIC_PPI 4 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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+ <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
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+ };
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+
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wcss: wcss-smp2p {
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compatible = "qcom,smp2p";
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qcom,smem = <435>, <428>;
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