72 lines
2.3 KiB
Diff
72 lines
2.3 KiB
Diff
From 3bc8e0aff23be0526af0dbc7973a8866a08d73f1 Mon Sep 17 00:00:00 2001
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From: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com>
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Date: Thu, 22 Apr 2021 22:21:08 -0700
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Subject: [PATCH] net: ethernet: mtk_eth_soc: use iopoll.h macro for DMA init
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Replace a tight busy-wait loop without a pause with a standard
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readx_poll_timeout_atomic routine with a 5 us poll period.
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Tested by booting a MT7621 device to ensure the driver initializes
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properly.
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Signed-off-by: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com>
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Reviewed-by: Andrew Lunn <andrew@lunn.ch>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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---
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drivers/net/ethernet/mediatek/mtk_eth_soc.c | 29 +++++++++------------
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drivers/net/ethernet/mediatek/mtk_eth_soc.h | 2 +-
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2 files changed, 14 insertions(+), 17 deletions(-)
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--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
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+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
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@@ -2054,25 +2054,22 @@ static int mtk_set_features(struct net_d
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/* wait for DMA to finish whatever it is doing before we start using it again */
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static int mtk_dma_busy_wait(struct mtk_eth *eth)
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{
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- unsigned long t_start = jiffies;
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+ unsigned int reg;
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+ int ret;
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+ u32 val;
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- while (1) {
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- if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) {
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- if (!(mtk_r32(eth, MTK_QDMA_GLO_CFG) &
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- (MTK_RX_DMA_BUSY | MTK_TX_DMA_BUSY)))
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- return 0;
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- } else {
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- if (!(mtk_r32(eth, MTK_PDMA_GLO_CFG) &
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- (MTK_RX_DMA_BUSY | MTK_TX_DMA_BUSY)))
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- return 0;
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- }
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+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA))
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+ reg = MTK_QDMA_GLO_CFG;
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+ else
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+ reg = MTK_PDMA_GLO_CFG;
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- if (time_after(jiffies, t_start + MTK_DMA_BUSY_TIMEOUT))
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- break;
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- }
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+ ret = readx_poll_timeout_atomic(__raw_readl, eth->base + reg, val,
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+ !(val & (MTK_RX_DMA_BUSY | MTK_TX_DMA_BUSY)),
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+ 5, MTK_DMA_BUSY_TIMEOUT_US);
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+ if (ret)
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+ dev_err(eth->dev, "DMA init timeout\n");
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- dev_err(eth->dev, "DMA init timeout\n");
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- return -1;
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+ return ret;
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}
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static int mtk_dma_init(struct mtk_eth *eth)
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--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
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+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
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@@ -213,7 +213,7 @@
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#define MTK_TX_DMA_BUSY BIT(1)
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#define MTK_RX_DMA_EN BIT(2)
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#define MTK_TX_DMA_EN BIT(0)
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-#define MTK_DMA_BUSY_TIMEOUT HZ
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+#define MTK_DMA_BUSY_TIMEOUT_US 1000000
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/* QDMA Reset Index Register */
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#define MTK_QDMA_RST_IDX 0x1A08
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