525 lines
9.1 KiB
Plaintext
525 lines
9.1 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later
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#include "qcom-ipq8065-smb208.dtsi"
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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/ {
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model = "Arris TR4400 v2";
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compatible = "arris,tr4400-v2", "qcom,ipq8065", "qcom,ipq8064";
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memory@0 {
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reg = <0x42000000 0x1e000000>;
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device_type = "memory";
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};
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aliases {
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led-boot = &led_status_blue;
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led-failsafe = &led_status_red;
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led-running = &led_status_blue;
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led-upgrade = &led_status_red;
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};
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chosen {
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bootargs = "rootfstype=squashfs noinitrd";
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};
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keys {
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compatible = "gpio-keys";
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pinctrl-0 = <&button_pins>;
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pinctrl-names = "default";
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reset {
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label = "reset";
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gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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debounce-interval = <60>;
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wakeup-source;
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};
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wps {
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label = "wps";
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gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_WPS_BUTTON>;
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debounce-interval = <60>;
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wakeup-source;
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};
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-0 = <&led_pins>;
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pinctrl-names = "default";
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led_status_red: status_red {
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function = LED_FUNCTION_STATUS;
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color = <LED_COLOR_ID_RED>;
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gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
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};
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led_status_blue: status_blue {
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function = LED_FUNCTION_STATUS;
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color = <LED_COLOR_ID_BLUE>;
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gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
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};
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};
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};
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&qcom_pinmux {
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button_pins: button_pins {
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mux {
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pins = "gpio6", "gpio54";
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function = "gpio";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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led_pins: led_pins {
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mux {
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pins = "gpio7", "gpio8";
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function = "gpio";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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rgmii2_pins: rgmii2-pins {
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tx {
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pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32";
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input-disable;
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};
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};
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spi_pins: spi_pins {
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cs {
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pins = "gpio20";
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drive-strength = <12>;
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};
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};
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};
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&gsbi5 {
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qcom,mode = <GSBI_PROT_SPI>;
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status = "okay";
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spi@1a280000 {
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status = "okay";
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pinctrl-0 = <&spi_pins>;
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pinctrl-names = "default";
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cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
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flash@0 {
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compatible = "everspin,mr25h256";
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spi-max-frequency = <40000000>;
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reg = <0>;
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};
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};
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};
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&nand {
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status = "okay";
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nand@0 {
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reg = <0>;
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compatible = "qcom,nandcs";
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nand-ecc-strength = <4>;
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nand-bus-width = <8>;
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nand-ecc-step-size = <512>;
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qcom,boot-partitions = <0x0 0x1180000 0x5340000 0x10c0000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "0:SBL1";
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reg = <0x0000000 0x0040000>;
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read-only;
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};
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partition@40000 {
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label = "0:MIBIB";
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reg = <0x0040000 0x0140000>;
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read-only;
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};
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partition@180000 {
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label = "0:SBL2";
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reg = <0x0180000 0x0140000>;
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read-only;
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};
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partition@2c0000 {
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label = "0:SBL3";
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reg = <0x02c0000 0x0280000>;
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read-only;
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};
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partition@540000 {
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label = "0:DDRCONFIG";
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reg = <0x0540000 0x0120000>;
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read-only;
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};
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partition@660000 {
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label = "0:SSD";
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reg = <0x0660000 0x0120000>;
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read-only;
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};
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partition@780000 {
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label = "0:TZ";
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reg = <0x0780000 0x0280000>;
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read-only;
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};
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partition@a00000 {
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label = "0:RPM";
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reg = <0x0a00000 0x0280000>;
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read-only;
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};
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partition@c80000 {
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label = "0:APPSBL";
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reg = <0x0c80000 0x0500000>;
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read-only;
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};
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partition@1180000 {
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label = "0:APPSBLENV";
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reg = <0x1180000 0x0080000>;
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};
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partition@1200000 {
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label = "0:ART";
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reg = <0x1200000 0x0140000>;
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read-only;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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precal_ART_1000: precal@1000 {
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reg = <0x1000 0x2f20>;
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};
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precal_ART_5000: precal@5000 {
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reg = <0x5000 0x2f20>;
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};
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};
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};
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stock_partition@1340000 {
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label = "stock_rootfs";
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reg = <0x1340000 0x4000000>;
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "extra";
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reg = <0x0 0x4000000>;
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};
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};
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partition@5340000 {
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label = "0:BOOTCONFIG";
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reg = <0x5340000 0x0060000>;
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read-only;
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};
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partition@53a0000 {
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label = "0:SBL2_1";
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reg = <0x53a0000 0x0140000>;
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read-only;
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};
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partition@54e0000 {
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label = "0:SBL3_1";
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reg = <0x54e0000 0x0280000>;
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read-only;
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};
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partition@5760000 {
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label = "0:DDRCONFIG_1";
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reg = <0x5760000 0x0120000>;
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read-only;
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};
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partition@5880000 {
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label = "0:SSD_1";
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reg = <0x5880000 0x0120000>;
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read-only;
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};
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partition@59a0000 {
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label = "0:TZ_1";
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reg = <0x59a0000 0x0280000>;
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read-only;
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};
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partition@5c20000 {
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label = "0:RPM_1";
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reg = <0x5c20000 0x0280000>;
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read-only;
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};
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partition@5ea0000 {
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label = "0:BOOTCONFIG1";
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reg = <0x5ea0000 0x0060000>;
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read-only;
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};
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partition@5f00000 {
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label = "0:APPSBL_1";
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reg = <0x5f00000 0x0500000>;
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read-only;
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};
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stock_partition@6400000 {
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label = "stock_rootfs_1";
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reg = <0x6400000 0x4000000>;
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "fw_env";
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reg = <0x0 0x100000>;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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macaddr_fw_env_0: macaddr@0 {
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reg = <0x00 0x6>;
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};
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macaddr_fw_env_6: macaddr@6 {
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reg = <0x06 0x6>;
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};
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macaddr_fw_env_c: macaddr@c {
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reg = <0x0c 0x6>;
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};
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macaddr_fw_env_12: macaddr@12 {
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reg = <0x12 0x6>;
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};
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macaddr_fw_env_18: macaddr@18 {
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reg = <0x18 0x6>;
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};
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};
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};
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partition@100000 {
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label = "ubi";
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reg = <0x100000 0x9b00000>;
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};
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};
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stock_partition@a400000 {
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label = "stock_fw_env";
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reg = <0xa400000 0x0100000>;
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};
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stock_partition@a500000 {
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label = "stock_config";
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reg = <0xa500000 0x0800000>;
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};
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stock_partition@ad00000 {
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label = "stock_PKI";
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reg = <0xad00000 0x0200000>;
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};
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stock_partition@af00000 {
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label = "stock_scfgmgr";
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reg = <0xaf00000 0x0100000>;
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};
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};
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};
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};
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&mdio0 {
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status = "okay";
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pinctrl-0 = <&mdio0_pins>;
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pinctrl-names = "default";
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switch@10 {
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compatible = "qca,qca8337";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x10>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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label = "cpu";
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ethernet = <&gmac0>;
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phy-mode = "rgmii";
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tx-internal-delay-ps = <1000>;
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rx-internal-delay-ps = <1000>;
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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port@1 {
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reg = <1>;
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label = "lan1";
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phy-mode = "internal";
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phy-handle = <&phy_port1>;
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};
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port@2 {
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reg = <2>;
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label = "lan2";
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phy-mode = "internal";
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phy-handle = <&phy_port2>;
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};
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port@3 {
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reg = <3>;
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label = "lan3";
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phy-mode = "internal";
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phy-handle = <&phy_port3>;
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};
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port@4 {
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reg = <4>;
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label = "lan4";
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phy-mode = "internal";
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phy-handle = <&phy_port4>;
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};
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port@6 {
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reg = <6>;
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label = "cpu";
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ethernet = <&gmac1>;
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phy-mode = "sgmii";
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qca,sgmii-enable-pll;
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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};
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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phy_port1: phy@0 {
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reg = <0>;
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};
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phy_port2: phy@1 {
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reg = <1>;
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};
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phy_port3: phy@2 {
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reg = <2>;
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};
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phy_port4: phy@3 {
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reg = <3>;
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};
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};
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};
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phy7: ethernet-phy@7 {
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reg = <7>;
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};
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};
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&gmac0 {
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status = "okay";
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phy-mode = "rgmii";
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qcom,id = <0>;
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nvmem-cells = <&macaddr_fw_env_18>;
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nvmem-cell-names = "mac-address";
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pinctrl-0 = <&rgmii2_pins>;
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pinctrl-names = "default";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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&gmac1 {
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status = "okay";
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phy-mode = "sgmii";
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qcom,id = <1>;
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nvmem-cells = <&macaddr_fw_env_0>;
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nvmem-cell-names = "mac-address";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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&gmac3 {
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status = "okay";
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phy-mode = "sgmii";
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qcom,id = <3>;
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phy-handle = <&phy7>;
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nvmem-cells = <&macaddr_fw_env_6>;
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nvmem-cell-names = "mac-address";
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};
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&adm_dma {
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status = "okay";
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};
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&hs_phy_1 {
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status = "okay";
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};
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&ss_phy_1 {
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status = "okay";
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};
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&usb3_1 {
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status = "okay";
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};
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&pcie0 {
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status = "okay";
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reset-gpios = <&qcom_pinmux 3 GPIO_ACTIVE_HIGH>;
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pinctrl-0 = <&pcie0_pins>;
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pinctrl-names = "default";
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bridge@0,0 {
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reg = <0x00000000 0 0 0 0>;
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#address-cells = <3>;
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#size-cells = <2>;
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ranges;
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wifi0: wifi@1,0 {
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compatible = "pci168c,0046";
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reg = <0x00010000 0 0 0 0>;
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nvmem-cells = <&precal_ART_1000>, <&macaddr_fw_env_12>;
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nvmem-cell-names = "pre-calibration", "mac-address";
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};
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};
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};
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&pcie1 {
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status = "okay";
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reset-gpios = <&qcom_pinmux 48 GPIO_ACTIVE_HIGH>;
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pinctrl-0 = <&pcie1_pins>;
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pinctrl-names = "default";
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max-link-speed = <1>;
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bridge@0,0 {
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reg = <0x00000000 0 0 0 0>;
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#address-cells = <3>;
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#size-cells = <2>;
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ranges;
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wifi1: wifi@1,0 {
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compatible = "pci168c,0040";
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reg = <0x00010000 0 0 0 0>;
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nvmem-cells = <&precal_ART_5000>, <&macaddr_fw_env_c>;
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nvmem-cell-names = "pre-calibration", "mac-address";
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};
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};
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};
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