mirror of
https://git.openwrt.org/openwrt/openwrt.git
synced 2024-06-15 11:43:54 +02:00
d840d1fdf9
Since with recent kernel version DTS moved to a dedicated directory, it's required to split files to per kernel version to follow kernel version directory structure. Also makes use of DEVICE_DTS_DIR to target the correct DTS directory based on the kernel version. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
542 lines
8.4 KiB
Plaintext
542 lines
8.4 KiB
Plaintext
#include "qcom-ipq8065-smb208.dtsi"
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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/ {
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memory@0 {
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reg = <0x42000000 0x1e000000>;
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device_type = "memory";
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};
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reserved-memory {
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rsvd@5fe00000 {
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reg = <0x5fe00000 0x200000>;
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reusable;
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};
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ramoops@42100000 {
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compatible = "ramoops";
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reg = <0x42100000 0x40000>;
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record-size = <0x4000>;
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console-size = <0x4000>;
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ftrace-size = <0x4000>;
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pmsg-size = <0x4000>;
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};
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};
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aliases {
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label-mac-device = &gmac2;
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led-boot = &power_white;
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led-failsafe = &power_amber;
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led-running = &power_white;
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led-upgrade = &power_amber;
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mdio-gpio0 = &mdio0;
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};
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keys {
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compatible = "gpio-keys";
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pinctrl-0 = <&button_pins>;
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pinctrl-names = "default";
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wifi {
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label = "wifi";
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gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RFKILL>;
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debounce-interval = <60>;
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wakeup-source;
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};
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reset {
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label = "reset";
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gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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debounce-interval = <60>;
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wakeup-source;
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};
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wps {
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label = "wps";
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gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_WPS_BUTTON>;
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debounce-interval = <60>;
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wakeup-source;
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};
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};
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leds: leds {
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compatible = "gpio-leds";
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pinctrl-0 = <&led_pins>;
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pinctrl-names = "default";
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power_white: power_white {
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function = LED_FUNCTION_POWER;
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color = <LED_COLOR_ID_WHITE>;
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gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
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default-state = "keep";
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};
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power_amber: power_amber {
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function = LED_FUNCTION_POWER;
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color = <LED_COLOR_ID_AMBER>;
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gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
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};
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wan_white {
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function = LED_FUNCTION_WAN;
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color = <LED_COLOR_ID_WHITE>;
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gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
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};
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wan_amber {
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function = LED_FUNCTION_WAN;
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color = <LED_COLOR_ID_AMBER>;
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gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
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};
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wifi {
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label = "white:wifi";
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gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
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};
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wps {
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function = LED_FUNCTION_WPS;
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color = <LED_COLOR_ID_WHITE>;
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gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
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};
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};
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};
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&qcom_pinmux {
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button_pins: button_pins {
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mux {
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pins = "gpio6", "gpio54", "gpio65";
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function = "gpio";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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led_pins: led_pins {
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mux {
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pins = "gpio7", "gpio8", "gpio9",
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"gpio22", "gpio23", "gpio24",
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"gpio26", "gpio53", "gpio64";
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function = "gpio";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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mdio0_pins: mdio0-pins {
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clk {
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pins = "gpio1";
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input-disable;
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};
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};
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rgmii2_pins: rgmii2-pins {
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tx {
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pins = "gpio27", "gpio28", "gpio29",
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"gpio30", "gpio31", "gpio32";
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input-disable;
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};
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};
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spi_pins: spi_pins {
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mux {
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pins = "gpio18", "gpio19", "gpio21";
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function = "gsbi5";
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bias-pull-down;
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};
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data {
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pins = "gpio18", "gpio19";
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drive-strength = <10>;
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};
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cs {
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pins = "gpio20";
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drive-strength = <10>;
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bias-pull-up;
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};
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clk {
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pins = "gpio21";
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drive-strength = <12>;
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};
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};
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spi6_pins: spi6_pins {
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mux {
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pins = "gpio55", "gpio56", "gpio58";
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function = "gsbi6";
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bias-pull-down;
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};
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mosi {
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pins = "gpio55";
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drive-strength = <12>;
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};
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miso {
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pins = "gpio56";
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drive-strength = <14>;
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};
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cs {
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pins = "gpio57";
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drive-strength = <12>;
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bias-pull-up;
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};
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clk {
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pins = "gpio58";
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drive-strength = <12>;
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};
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reset {
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pins = "gpio33";
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drive-strength = <10>;
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bias-pull-down;
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output-high;
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};
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};
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usb0_pwr_en_pins: usb0_pwr_en_pins {
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mux {
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pins = "gpio15";
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function = "gpio";
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drive-strength = <12>;
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bias-pull-down;
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output-high;
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};
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};
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usb1_pwr_en_pins: usb1_pwr_en_pins {
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mux {
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pins = "gpio16", "gpio68";
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function = "gpio";
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drive-strength = <12>;
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bias-pull-down;
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output-high;
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};
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};
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};
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&nand {
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status = "okay";
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nand@0 {
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reg = <0>;
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compatible = "qcom,nandcs";
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nand-ecc-strength = <4>;
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nand-bus-width = <8>;
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nand-ecc-step-size = <512>;
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nand-is-boot-medium;
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qcom,boot-partitions = <0x0 0x1180000>;
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partitions: partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "qcadata";
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reg = <0x0000000 0x0c80000>;
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read-only;
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};
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partition@c80000 {
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label = "APPSBL";
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reg = <0x0c80000 0x0500000>;
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read-only;
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};
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partition@1180000 {
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label = "APPSBLENV";
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reg = <0x1180000 0x0080000>;
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read-only;
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};
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art: partition@1200000 {
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label = "art";
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reg = <0x1200000 0x0140000>;
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read-only;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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macaddr_art_0: macaddr@0 {
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reg = <0x0 0x6>;
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};
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macaddr_art_6: macaddr@6 {
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compatible = "mac-base";
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reg = <0x6 0x6>;
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#nvmem-cell-cells = <1>;
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};
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macaddr_art_c: macaddr@c {
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reg = <0xc 0x6>;
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};
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precal_art_1000: precal@1000 {
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reg = <0x1000 0x2f20>;
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};
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precal_art_5000: precal@5000 {
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reg = <0x5000 0x2f20>;
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};
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};
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};
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partition@1340000 {
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label = "artbak";
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reg = <0x1340000 0x0140000>;
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read-only;
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};
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partition@1480000 {
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label = "kernel";
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reg = <0x1480000 0x0400000>;
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};
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};
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};
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};
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&mdio0 {
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status = "okay";
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pinctrl-0 = <&mdio0_pins>;
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pinctrl-names = "default";
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switch@10 {
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compatible = "qca,qca8337";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x10>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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label = "cpu";
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ethernet = <&gmac1>;
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phy-mode = "rgmii";
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tx-internal-delay-ps = <1000>;
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rx-internal-delay-ps = <1000>;
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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port@1 {
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reg = <1>;
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label = "lan4";
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phy-mode = "internal";
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phy-handle = <&phy_port1>;
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};
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port@2 {
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reg = <2>;
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label = "lan3";
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phy-mode = "internal";
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phy-handle = <&phy_port2>;
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};
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port@3 {
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reg = <3>;
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label = "lan2";
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phy-mode = "internal";
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phy-handle = <&phy_port3>;
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};
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port@4 {
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reg = <4>;
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label = "lan1";
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phy-mode = "internal";
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phy-handle = <&phy_port4>;
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};
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port@5 {
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reg = <5>;
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label = "wan";
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phy-mode = "internal";
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phy-handle = <&phy_port5>;
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};
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port@6 {
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reg = <6>;
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label = "cpu";
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ethernet = <&gmac2>;
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phy-mode = "sgmii";
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qca,sgmii-enable-pll;
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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};
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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phy_port1: phy@0 {
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reg = <0>;
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};
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phy_port2: phy@1 {
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reg = <1>;
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};
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phy_port3: phy@2 {
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reg = <2>;
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};
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phy_port4: phy@3 {
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reg = <3>;
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};
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phy_port5: phy@4 {
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reg = <4>;
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};
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};
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};
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};
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&gmac1 {
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status = "okay";
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phy-mode = "rgmii";
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qcom,id = <1>;
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qcom,phy_mdio_addr = <4>;
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qcom,poll_required = <0>;
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qcom,rgmii_delay = <1>;
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qcom,phy_mii_type = <0>;
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qcom,emulation = <0>;
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qcom,irq = <255>;
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mdiobus = <&mdio0>;
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pinctrl-0 = <&rgmii2_pins>;
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pinctrl-names = "default";
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nvmem-cells = <&macaddr_art_6 0>;
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nvmem-cell-names = "mac-address";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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&gmac2 {
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status = "okay";
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phy-mode = "sgmii";
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qcom,id = <2>;
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qcom,phy_mdio_addr = <0>; /* none */
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qcom,poll_required = <0>; /* no polling */
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qcom,rgmii_delay = <0>;
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qcom,phy_mii_type = <1>;
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qcom,emulation = <0>;
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qcom,irq = <258>;
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mdiobus = <&mdio0>;
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nvmem-cells = <&macaddr_art_0>;
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nvmem-cell-names = "mac-address";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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&adm_dma {
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status = "okay";
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};
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&sata_phy {
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status = "okay";
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};
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&sata {
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status = "okay";
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};
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&hs_phy_0 {
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status = "okay";
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};
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&ss_phy_0 {
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status = "okay";
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};
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&usb3_0 {
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status = "okay";
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pinctrl-0 = <&usb0_pwr_en_pins>;
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pinctrl-names = "default";
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};
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&hs_phy_1 {
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status = "okay";
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};
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&ss_phy_1 {
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status = "okay";
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};
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&usb3_1 {
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status = "okay";
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pinctrl-0 = <&usb1_pwr_en_pins>;
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pinctrl-names = "default";
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};
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&pcie0 {
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status = "okay";
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bridge@0,0 {
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reg = <0x00000000 0 0 0 0>;
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#address-cells = <3>;
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#size-cells = <2>;
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ranges;
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wifi0: wifi@1,0 {
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compatible = "pci168c,0046";
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reg = <0x00010000 0 0 0 0>;
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};
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};
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};
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&pcie1 {
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status = "okay";
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max-link-speed = <1>;
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bridge@0,0 {
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reg = <0x00000000 0 0 0 0>;
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#address-cells = <3>;
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#size-cells = <2>;
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ranges;
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wifi1: wifi@1,0 {
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compatible = "pci168c,0046";
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reg = <0x00010000 0 0 0 0>;
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};
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};
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};
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