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![Christian Marangi](/assets/img/avatar_default.png)
Since with recent kernel version DTS moved to a dedicated directory, it's required to split files to per kernel version to follow kernel version directory structure. Also makes use of DEVICE_DTS_DIR to target the correct DTS directory based on the kernel version. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
318 lines
4.7 KiB
Plaintext
318 lines
4.7 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "qcom-ipq8064-v2.0-smb208.dtsi"
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#include <dt-bindings/input/input.h>
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/ {
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chosen {
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bootargs = "console=ttyMSM0,115200n8";
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/* append to bootargs adding the root deviceblock nbr from bootloader */
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append-rootblock = "ubi.mtd=";
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};
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};
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&qcom_pinmux {
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/* eax500 routers reuse the pcie2 reset pin for switch reset pin */
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switch_reset: switch_reset_pins {
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mux {
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pins = "gpio63";
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function = "gpio";
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drive-strength = <12>;
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bias-pull-up;
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};
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};
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};
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&hs_phy_0 {
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status = "okay";
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};
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&ss_phy_0 {
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status = "okay";
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};
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&usb3_0 {
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status = "okay";
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};
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&hs_phy_1 {
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status = "okay";
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};
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&ss_phy_1 {
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status = "okay";
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};
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&usb3_1 {
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status = "okay";
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};
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&pcie0 {
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status = "okay";
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max-link-speed = <1>;
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};
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&pcie1 {
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status = "okay";
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};
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&nand {
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status = "okay";
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nand@0 {
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reg = <0>;
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compatible = "qcom,nandcs";
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nand-ecc-strength = <4>;
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nand-bus-width = <8>;
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nand-ecc-step-size = <512>;
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nand-is-boot-medium;
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qcom,boot-partitions = <0x0 0x0c80000>;
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partitions: partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "SBL1";
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reg = <0x0000000 0x0040000>;
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read-only;
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};
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partition@40000 {
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label = "MIBIB";
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reg = <0x0040000 0x0140000>;
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read-only;
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};
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partition@180000 {
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label = "SBL2";
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reg = <0x0180000 0x0140000>;
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read-only;
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};
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partition@2c0000 {
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label = "SBL3";
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reg = <0x02c0000 0x0280000>;
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read-only;
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};
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partition@540000 {
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label = "DDRCONFIG";
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reg = <0x0540000 0x0120000>;
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read-only;
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};
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partition@660000 {
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label = "SSD";
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reg = <0x0660000 0x0120000>;
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read-only;
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};
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partition@780000 {
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label = "TZ";
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reg = <0x0780000 0x0280000>;
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read-only;
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};
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partition@a00000 {
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label = "RPM";
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reg = <0x0a00000 0x0280000>;
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read-only;
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};
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art: partition@c80000 {
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label = "art";
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reg = <0x0c80000 0x0140000>;
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read-only;
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};
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partition@dc0000 {
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label = "APPSBL";
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reg = <0x0dc0000 0x0100000>;
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read-only;
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};
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partition@ec0000 {
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label = "u_env";
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reg = <0x0ec0000 0x0040000>;
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};
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partition@f00000 {
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label = "s_env";
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reg = <0x0f00000 0x0040000>;
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};
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partition@f40000 {
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label = "devinfo";
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reg = <0x0f40000 0x0040000>;
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};
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partition@f80000 {
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label = "kernel1";
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reg = <0x0f80000 0x2800000>; /* 4 MB, spill to rootfs */
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};
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partition@1380000 {
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label = "rootfs1";
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reg = <0x1380000 0x2400000>;
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};
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partition@3780000 {
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label = "kernel2";
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reg = <0x3780000 0x2800000>;
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};
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partition@3b80000 {
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label = "rootfs2";
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reg = <0x3b80000 0x2400000>;
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};
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};
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};
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};
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&mdio0 {
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status = "okay";
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pinctrl-0 = <&mdio0_pins>;
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pinctrl-names = "default";
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/* Switch from documentation require at least 10ms for reset */
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reset-gpios = <&qcom_pinmux 63 GPIO_ACTIVE_HIGH>;
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reset-post-delay-us = <12000>;
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switch@10 {
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compatible = "qca,qca8337";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x10>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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label = "cpu";
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ethernet = <&gmac1>;
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phy-mode = "rgmii";
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tx-internal-delay-ps = <1000>;
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rx-internal-delay-ps = <1000>;
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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port@1 {
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reg = <1>;
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label = "lan1";
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phy-mode = "internal";
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phy-handle = <&phy_port1>;
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};
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port@2 {
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reg = <2>;
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label = "lan2";
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phy-mode = "internal";
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phy-handle = <&phy_port2>;
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};
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port@3 {
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reg = <3>;
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label = "lan3";
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phy-mode = "internal";
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phy-handle = <&phy_port3>;
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};
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port@4 {
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reg = <4>;
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label = "lan4";
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phy-mode = "internal";
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phy-handle = <&phy_port4>;
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};
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port@5 {
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reg = <5>;
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label = "wan";
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phy-mode = "internal";
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phy-handle = <&phy_port5>;
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};
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port@6 {
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reg = <6>;
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label = "cpu";
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ethernet = <&gmac2>;
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phy-mode = "sgmii";
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qca,sgmii-enable-pll;
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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};
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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phy_port1: phy@0 {
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reg = <0>;
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};
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phy_port2: phy@1 {
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reg = <1>;
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};
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phy_port3: phy@2 {
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reg = <2>;
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};
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phy_port4: phy@3 {
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reg = <3>;
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};
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phy_port5: phy@4 {
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reg = <4>;
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};
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};
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};
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};
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&gmac1 {
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status = "okay";
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phy-mode = "rgmii";
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qcom,id = <1>;
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pinctrl-0 = <&rgmii2_pins>;
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pinctrl-names = "default";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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&gmac2 {
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status = "okay";
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phy-mode = "sgmii";
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qcom,id = <2>;
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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&adm_dma {
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status = "okay";
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};
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