220 lines
2.8 KiB
Plaintext
220 lines
2.8 KiB
Plaintext
#include "qcom-ipq8064-v1.0.dtsi"
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/ {
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model = "Qualcomm Technologies, Inc. IPQ8064/AP-148";
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compatible = "qcom,ipq8064-ap148", "qcom,ipq8064";
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memory@0 {
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reg = <0x42000000 0x1e000000>;
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device_type = "memory";
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};
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reserved-memory {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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rsvd@41200000 {
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reg = <0x41200000 0x300000>;
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no-map;
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};
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};
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aliases {
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mdio-gpio0 = &mdio0;
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};
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};
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&adm_dma {
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status = "okay";
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};
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&flash {
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partitions {
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compatible = "qcom,smem-part";
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};
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};
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&hs_phy_0 {
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status = "okay";
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};
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&ss_phy_0 {
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status = "okay";
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};
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&usb3_0 {
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status = "okay";
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};
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&hs_phy_1 {
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status = "okay";
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};
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&ss_phy_1 {
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status = "okay";
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};
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&usb3_1 {
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status = "okay";
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};
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&pcie0 {
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status = "okay";
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};
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&pcie1 {
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status = "okay";
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max-link-speed = <1>;
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};
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&nand {
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status = "okay";
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nand@0 {
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reg = <0>;
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compatible = "qcom,nandcs";
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nand-ecc-strength = <4>;
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nand-bus-width = <8>;
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nand-ecc-step-size = <512>;
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partitions {
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compatible = "qcom,smem-part";
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};
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};
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};
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&mdio0 {
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status = "okay";
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pinctrl-0 = <&mdio0_pins>;
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pinctrl-names = "default";
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switch@10 {
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compatible = "qca,qca8337";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x10>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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label = "cpu";
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ethernet = <&gmac1>;
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phy-mode = "rgmii";
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tx-internal-delay-ps = <1000>;
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rx-internal-delay-ps = <1000>;
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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port@1 {
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reg = <1>;
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label = "lan1";
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phy-mode = "internal";
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phy-handle = <&phy_port1>;
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};
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port@2 {
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reg = <2>;
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label = "lan2";
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phy-mode = "internal";
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phy-handle = <&phy_port2>;
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};
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port@3 {
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reg = <3>;
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label = "lan3";
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phy-mode = "internal";
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phy-handle = <&phy_port3>;
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};
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port@4 {
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reg = <4>;
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label = "lan4";
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phy-mode = "internal";
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phy-handle = <&phy_port4>;
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};
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port@5 {
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reg = <5>;
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label = "wan";
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phy-mode = "internal";
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phy-handle = <&phy_port5>;
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};
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/*
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port@6 {
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reg = <0>;
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label = "cpu";
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ethernet = <&gmac2>;
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phy-mode = "rgmii";
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fixed-link {
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speed = <1000>;
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full-duplex;
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pause;
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asym-pause;
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};
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};
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*/
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};
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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phy_port1: phy@0 {
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reg = <0>;
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};
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phy_port2: phy@1 {
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reg = <1>;
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};
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phy_port3: phy@2 {
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reg = <2>;
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};
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phy_port4: phy@3 {
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reg = <3>;
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};
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phy_port5: phy@4 {
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reg = <4>;
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};
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};
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};
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};
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&gmac1 {
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status = "okay";
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phy-mode = "rgmii";
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qcom,id = <1>;
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pinctrl-0 = <&rgmii2_pins>;
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pinctrl-names = "default";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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&gmac2 {
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status = "okay";
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phy-mode = "sgmii";
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qcom,id = <2>;
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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