135 lines
4.6 KiB
Diff
135 lines
4.6 KiB
Diff
From 110cf6bdc1d79f2ee7a435bc9d1ec900aba11ed5 Mon Sep 17 00:00:00 2001
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From: Maxime Ripard <maxime@cerno.tech>
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Date: Thu, 26 Dec 2019 18:41:53 +0100
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Subject: [PATCH] drm/vc4: hdmi: Add a CSC setup callback
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Similarly to the previous patches, the CSC setup is slightly different in
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the BCM2711 than in the previous generations. Let's add a callback for it.
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Signed-off-by: Maxime Ripard <maxime@cerno.tech>
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---
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drivers/gpu/drm/vc4/vc4_hdmi.c | 71 ++++++++++++++++++++--------------
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drivers/gpu/drm/vc4/vc4_hdmi.h | 3 ++
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2 files changed, 45 insertions(+), 29 deletions(-)
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--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
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+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
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@@ -337,6 +337,41 @@ static void vc4_hdmi_encoder_disable(str
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DRM_ERROR("Failed to release power domain: %d\n", ret);
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}
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+static void vc4_hdmi_csc_setup(struct vc4_hdmi *vc4_hdmi, bool enable)
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+{
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+ u32 csc_ctl;
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+
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+ csc_ctl = VC4_SET_FIELD(VC4_HD_CSC_CTL_ORDER_BGR,
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+ VC4_HD_CSC_CTL_ORDER);
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+
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+ if (enable) {
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+ /* CEA VICs other than #1 requre limited range RGB
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+ * output unless overridden by an AVI infoframe.
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+ * Apply a colorspace conversion to squash 0-255 down
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+ * to 16-235. The matrix here is:
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+ *
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+ * [ 0 0 0.8594 16]
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+ * [ 0 0.8594 0 16]
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+ * [ 0.8594 0 0 16]
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+ * [ 0 0 0 1]
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+ */
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+ csc_ctl |= VC4_HD_CSC_CTL_ENABLE;
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+ csc_ctl |= VC4_HD_CSC_CTL_RGB2YCC;
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+ csc_ctl |= VC4_SET_FIELD(VC4_HD_CSC_CTL_MODE_CUSTOM,
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+ VC4_HD_CSC_CTL_MODE);
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+
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+ HDMI_WRITE(HDMI_CSC_12_11, (0x000 << 16) | 0x000);
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+ HDMI_WRITE(HDMI_CSC_14_13, (0x100 << 16) | 0x6e0);
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+ HDMI_WRITE(HDMI_CSC_22_21, (0x6e0 << 16) | 0x000);
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+ HDMI_WRITE(HDMI_CSC_24_23, (0x100 << 16) | 0x000);
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+ HDMI_WRITE(HDMI_CSC_32_31, (0x000 << 16) | 0x6e0);
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+ HDMI_WRITE(HDMI_CSC_34_33, (0x100 << 16) | 0x000);
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+ }
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+
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+ /* The RGB order applies even when CSC is disabled. */
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+ HDMI_WRITE(HDMI_CSC_CTL, csc_ctl);
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+}
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+
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static void vc4_hdmi_encoder_enable(struct drm_encoder *encoder)
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{
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struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode;
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@@ -360,7 +395,6 @@ static void vc4_hdmi_encoder_enable(stru
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mode->crtc_vsync_end -
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interlaced,
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VC4_HDMI_VERTB_VBP));
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- u32 csc_ctl;
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int ret;
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ret = pm_runtime_get_sync(&vc4_hdmi->pdev->dev);
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@@ -431,41 +465,19 @@ static void vc4_hdmi_encoder_enable(stru
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(vsync_pos ? 0 : VC4_HD_VID_CTL_VSYNC_LOW) |
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(hsync_pos ? 0 : VC4_HD_VID_CTL_HSYNC_LOW));
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- csc_ctl = VC4_SET_FIELD(VC4_HD_CSC_CTL_ORDER_BGR,
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- VC4_HD_CSC_CTL_ORDER);
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-
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if (vc4_encoder->hdmi_monitor &&
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- drm_default_rgb_quant_range(mode) ==
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- HDMI_QUANTIZATION_RANGE_LIMITED) {
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- /* CEA VICs other than #1 requre limited range RGB
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- * output unless overridden by an AVI infoframe.
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- * Apply a colorspace conversion to squash 0-255 down
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- * to 16-235. The matrix here is:
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- *
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- * [ 0 0 0.8594 16]
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- * [ 0 0.8594 0 16]
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- * [ 0.8594 0 0 16]
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- * [ 0 0 0 1]
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- */
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- csc_ctl |= VC4_HD_CSC_CTL_ENABLE;
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- csc_ctl |= VC4_HD_CSC_CTL_RGB2YCC;
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- csc_ctl |= VC4_SET_FIELD(VC4_HD_CSC_CTL_MODE_CUSTOM,
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- VC4_HD_CSC_CTL_MODE);
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+ drm_default_rgb_quant_range(mode) == HDMI_QUANTIZATION_RANGE_LIMITED) {
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+ if (vc4_hdmi->variant->csc_setup)
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+ vc4_hdmi->variant->csc_setup(vc4_hdmi, true);
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- HDMI_WRITE(HDMI_CSC_12_11, (0x000 << 16) | 0x000);
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- HDMI_WRITE(HDMI_CSC_14_13, (0x100 << 16) | 0x6e0);
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- HDMI_WRITE(HDMI_CSC_22_21, (0x6e0 << 16) | 0x000);
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- HDMI_WRITE(HDMI_CSC_24_23, (0x100 << 16) | 0x000);
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- HDMI_WRITE(HDMI_CSC_32_31, (0x000 << 16) | 0x6e0);
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- HDMI_WRITE(HDMI_CSC_34_33, (0x100 << 16) | 0x000);
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vc4_encoder->limited_rgb_range = true;
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} else {
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+ if (vc4_hdmi->variant->csc_setup)
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+ vc4_hdmi->variant->csc_setup(vc4_hdmi, false);
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+
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vc4_encoder->limited_rgb_range = false;
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}
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- /* The RGB order applies even when CSC is disabled. */
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- HDMI_WRITE(HDMI_CSC_CTL, csc_ctl);
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-
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HDMI_WRITE(HDMI_FIFO_CTL, VC4_HDMI_FIFO_CTL_MASTER_SLAVE_N);
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if (debug_dump_regs) {
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@@ -1427,6 +1439,7 @@ static const struct vc4_hdmi_variant bcm
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.num_registers = ARRAY_SIZE(vc4_hdmi_fields),
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.init_resources = vc4_hdmi_init_resources,
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+ .csc_setup = vc4_hdmi_csc_setup,
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.reset = vc4_hdmi_reset,
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.phy_init = vc4_hdmi_phy_init,
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.phy_disable = vc4_hdmi_phy_disable,
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--- a/drivers/gpu/drm/vc4/vc4_hdmi.h
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+++ b/drivers/gpu/drm/vc4/vc4_hdmi.h
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@@ -41,6 +41,9 @@ struct vc4_hdmi_variant {
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/* Callback to reset the HDMI block */
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void (*reset)(struct vc4_hdmi *vc4_hdmi);
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+ /* Callback to enable / disable the CSC */
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+ void (*csc_setup)(struct vc4_hdmi *vc4_hdmi, bool enable);
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+
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/* Callback to initialize the PHY according to the mode */
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void (*phy_init)(struct vc4_hdmi *vc4_hdmi,
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struct drm_display_mode *mode);
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