1
0
mirror of https://git.openwrt.org/openwrt/openwrt.git synced 2024-06-24 08:37:28 +02:00
openwrt/target/linux/realtek/dts-5.15/rtl8380_tplink_sg2xxx.dtsi
INAGAKI Hiroshi 8fb15ea52a realtek: copy dts/files/patches/configs for 5.15
Copy dts/files/patches/configs from 5.10 to 5.15.

Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
[refresh with updated DGS-1210 dts files]
Signed-off-by: Sander Vanheule <sander@svanheule.net>
2022-12-15 20:52:09 +01:00

184 lines
3.3 KiB
Plaintext

// SPDX-License-Identifier: GPL-2.0-or-later
#include "rtl838x.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
/ {
aliases {
led-boot = &led_power;
led-failsafe = &led_power;
led-running = &led_power;
led-upgrade = &led_power;
label-mac-device = &ethernet0;
};
memory@0 {
device_type = "memory";
reg = <0x0 0x10000000>;
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
gpio-restart {
compatible = "gpio-restart";
gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
};
leds {
compatible = "gpio-leds";
led_power: led-0 {
label = "green:power";
gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
};
};
i2c1: i2c-gpio-1 {
compatible = "i2c-gpio";
scl-gpios = <&gpio0 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
sda-gpios = <&gpio0 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
i2c-gpio,delay-us = <2>;
#address-cells = <1>;
#size-cells = <0>;
tps23861_20: tps23861@20 {
compatible = "ti,tps23861";
reg = <0x20>;
shunt-resistor-micro-ohms = <255000>;
};
tps23861_28: tps23861@28 {
compatible = "ti,tps23861";
reg = <0x28>;
shunt-resistor-micro-ohms = <255000>;
};
};
watchdog {
compatible = "linux,wdt-gpio";
gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
hw_algo = "toggle";
/* SGM706 specs: typical 1.6s, but minimum 1.0s. */
hw_margin_ms = <1000>;
};
};
&gpio0 {
watchdog-enable {
gpio-hog;
gpios = <14 GPIO_ACTIVE_LOW>;
output-low;
line-name = "watchdog-enable";
};
};
&spi0 {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <10000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0 0xe0000>;
read-only;
};
partition@e0000 {
label = "u-boot-env";
reg = <0xe0000 0x20000>;
};
partition@100000 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x100000 0x1a00000>;
};
partition@1b00000 {
label = "usrappfs";
reg = <0x1b00000 0x400000>;
};
partition@1f00000 {
compatible = "nvmem-cells";
label = "para";
reg = <0x1f00000 0x100000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
factory_macaddr: macaddr@fdff4 {
reg = <0xfdff4 0x6>;
};
};
};
};
};
&ethernet0 {
nvmem-cells = <&factory_macaddr>;
nvmem-cell-names = "mac-address";
mdio: mdio-bus {
compatible = "realtek,rtl838x-mdio";
#address-cells = <1>;
#size-cells = <0>;
INTERNAL_PHY(8)
INTERNAL_PHY(9)
INTERNAL_PHY(10)
INTERNAL_PHY(11)
INTERNAL_PHY(12)
INTERNAL_PHY(13)
INTERNAL_PHY(14)
INTERNAL_PHY(15)
INTERNAL_PHY(24)
INTERNAL_PHY(26)
};
};
&switch0 {
ports {
#address-cells = <1>;
#size-cells = <0>;
SWITCH_PORT(15, 1, internal)
SWITCH_PORT(14, 2, internal)
SWITCH_PORT(13, 3, internal)
SWITCH_PORT(12, 4, internal)
SWITCH_PORT(11, 5, internal)
SWITCH_PORT(10, 6, internal)
SWITCH_PORT(9, 7, internal)
SWITCH_PORT(8, 8, internal)
SWITCH_SFP_PORT(24, 9, 1000base-x)
SWITCH_SFP_PORT(26, 10, 1000base-x)
port@28 {
ethernet = <&ethernet0>;
reg = <28>;
phy-mode = "internal";
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};