45 lines
1.8 KiB
Diff
45 lines
1.8 KiB
Diff
From f92c2f22197b7beed59b81f2aa179e16987c02e4 Mon Sep 17 00:00:00 2001
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From: Sricharan Ramabadhran <quic_srichara@quicinc.com>
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Date: Mon, 24 Jul 2023 12:04:29 +0530
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Subject: [PATCH] PCI: qcom: Fixing broken pcie enumeration for 2_3_3 configs
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ops
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PARF_SLV_ADDR_SPACE_SIZE_2_3_3 macro is used for IPQ8074 2_3_3 post_init.
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PCIe slave addr register offset is 0x358, but was wrongly changed to
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0x168 as a part of commit 39171b33f652 ("PCI: qcom: Remove PCIE20_ prefix
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from register definitions"). Fixing it, by using the right macro and remove
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the unused PARF_SLV_ADDR_SPACE_SIZE_2_3_3.
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Without this access to the registers of slave addr space like iATU etc
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are broken leading to pcie enumeration failure.
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Fixes: 39171b33f652 ("PCI: qcom: Remove PCIE20_ prefix from register definitions")
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Cc: <Stable@vger.kernel.org>
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Reviewed-by: Manivannan Sadhasivam <mani@kernel.org>
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Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
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Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
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---
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drivers/pci/controller/dwc/pcie-qcom.c | 4 +---
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1 file changed, 1 insertion(+), 3 deletions(-)
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--- a/drivers/pci/controller/dwc/pcie-qcom.c
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+++ b/drivers/pci/controller/dwc/pcie-qcom.c
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@@ -40,7 +40,6 @@
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#define PARF_PHY_REFCLK 0x4c
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#define PARF_CONFIG_BITS 0x50
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#define PARF_DBI_BASE_ADDR 0x168
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-#define PARF_SLV_ADDR_SPACE_SIZE_2_3_3 0x16c /* Register offset specific to IP ver 2.3.3 */
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#define PARF_MHI_CLOCK_RESET_CTRL 0x174
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#define PARF_AXI_MSTR_WR_ADDR_HALT 0x178
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#define PARF_AXI_MSTR_WR_ADDR_HALT_V2 0x1a8
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@@ -1148,8 +1147,7 @@ static int qcom_pcie_post_init_2_3_3(str
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u16 offset = dw_pcie_find_capability(pci, PCI_CAP_ID_EXP);
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u32 val;
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- writel(SLV_ADDR_SPACE_SZ,
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- pcie->parf + PARF_SLV_ADDR_SPACE_SIZE_2_3_3);
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+ writel(SLV_ADDR_SPACE_SZ, pcie->parf + PARF_SLV_ADDR_SPACE_SIZE);
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val = readl(pcie->parf + PARF_PHY_CTRL);
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val &= ~BIT(0);
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