37 lines
1.3 KiB
Diff
37 lines
1.3 KiB
Diff
From 6e84ab604bdedaa16239bd1c6e5fcb5660309f02 Mon Sep 17 00:00:00 2001
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From: Heiner Kallweit <hkallweit1@gmail.com>
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Date: Wed, 5 Apr 2017 20:33:26 +0200
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Subject: [PATCH] brcmfmac: properly align buffers on certain platforms with 64
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bit DMA
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Systems with 64 bit DMA at least partially require buffers to be used
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for DMA to be 8-byte-aligned. One example is Amlogic Meson GX.
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Switching the MMC/SDIO driver for this platform to SG DMA mode
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resulted in problems due to unaligned buffers.
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Fortunately the brcmfmac driver has a global define for the alignment.
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Changing it to 8 fixed the issues with Meson GX.
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Suggested-by: Helmut Klein <hgkr.klein@gmail.com>
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Tested-by: Helmut Klein <hgkr.klein@gmail.com>
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Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
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Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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---
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drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c | 4 ++++
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1 file changed, 4 insertions(+)
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--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c
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+++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c
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@@ -540,7 +540,11 @@ static int qcount[NUMPRIO];
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/* Limit on rounding up frames */
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static const uint max_roundup = 512;
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+#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
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+#define ALIGNMENT 8
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+#else
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#define ALIGNMENT 4
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+#endif
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enum brcmf_sdio_frmtype {
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BRCMF_SDIO_FT_NORMAL,
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