185 lines
5.1 KiB
Diff
185 lines
5.1 KiB
Diff
From 924453aa9d2324e5611f8e2b71df746d8f0c79f1 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Ren=C3=A9=20van=20Dorst?= <opensource@vdorst.com>
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Date: Fri, 13 Nov 2020 16:11:32 +0100
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Subject: [PATCH] net: phy: at803x: add support for SFP module in
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RGMII-to-x-base mode
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Signed-off-by: René van Dorst <opensource@vdorst.com>
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---
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drivers/net/phy/at803x.c | 91 ++++++++++++++++++++++++++++++++++++++++
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1 file changed, 91 insertions(+)
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--- a/drivers/net/phy/at803x.c
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+++ b/drivers/net/phy/at803x.c
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@@ -20,6 +20,8 @@
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#include <linux/regulator/driver.h>
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#include <linux/regulator/consumer.h>
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#include <dt-bindings/net/qca-ar803x.h>
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+#include <linux/sfp.h>
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+#include <linux/phylink.h>
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#define AT803X_SPECIFIC_FUNCTION_CONTROL 0x10
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#define AT803X_SFC_ASSERT_CRS BIT(11)
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@@ -82,9 +84,18 @@
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#define AT803X_MODE_CFG_MASK 0x0F
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#define AT803X_MODE_CFG_SGMII 0x01
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+#define AT803X_MODE_CFG_BX1000_RGMII_50 0x02
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+#define AT803X_MODE_CFG_BX1000_RGMII_75 0x03
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+#define AT803X_MODE_FIBER 0x01
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+#define AT803X_MODE_COPPER 0x00
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#define AT803X_PSSR 0x11 /*PHY-Specific Status Register*/
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#define AT803X_PSSR_MR_AN_COMPLETE 0x0200
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+#define PSSR_LINK BIT(10)
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+#define PSSR_SYNC_STATUS BIT(8)
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+#define PSSR_DUPLEX BIT(13)
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+#define PSSR_SPEED_1000 BIT(15)
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+#define PSSR_SPEED_100 BIT(14)
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#define AT803X_DEBUG_ANALOG_TEST_CTRL 0x00
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#define QCA8327_DEBUG_MANU_CTRL_EN BIT(2)
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@@ -652,12 +663,75 @@ static int at803x_parse_dt(struct phy_de
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return 0;
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}
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+static int at803x_mode(struct phy_device *phydev)
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+{
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+ int mode;
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+
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+ mode = phy_read(phydev, AT803X_REG_CHIP_CONFIG) & AT803X_MODE_CFG_MASK;
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+
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+ if (mode == AT803X_MODE_CFG_BX1000_RGMII_50 ||
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+ mode == AT803X_MODE_CFG_BX1000_RGMII_75)
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+ return AT803X_MODE_FIBER;
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+ return AT803X_MODE_COPPER;
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+}
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+
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+static int at803x_sfp_insert(void *upstream, const struct sfp_eeprom_id *id)
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+{
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+ __ETHTOOL_DECLARE_LINK_MODE_MASK(at803x_support) = { 0, };
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+ __ETHTOOL_DECLARE_LINK_MODE_MASK(support) = { 0, };
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+ struct phy_device *phydev = upstream;
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+ phy_interface_t iface;
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+
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+ phylink_set(at803x_support, 1000baseX_Full);
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+ /* AT803x only support 1000baseX but SGMII works fine when module runs
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+ * at 1Gbit.
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+ */
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+ phylink_set(at803x_support, 1000baseT_Full);
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+
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+ sfp_parse_support(phydev->sfp_bus, id, support);
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+
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+ // Limit to interfaces that both sides support
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+ linkmode_and(support, support, at803x_support);
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+
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+ if (linkmode_empty(support))
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+ goto unsupported_mode;
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+
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+ iface = sfp_select_interface(phydev->sfp_bus, support);
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+
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+ if (iface != PHY_INTERFACE_MODE_SGMII &&
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+ iface != PHY_INTERFACE_MODE_1000BASEX)
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+ goto unsupported_mode;
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+
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+ dev_info(&phydev->mdio.dev, "SFP interface %s", phy_modes(iface));
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+
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+ return 0;
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+
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+unsupported_mode:
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+ dev_info(&phydev->mdio.dev, "incompatible SFP module inserted;"
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+ "Only SGMII at 1Gbit/1000BASEX are supported!\n");
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+ return -EINVAL;
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+}
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+
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+static const struct sfp_upstream_ops at803x_sfp_ops = {
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+ .attach = phy_sfp_attach,
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+ .detach = phy_sfp_detach,
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+ .module_insert = at803x_sfp_insert,
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+};
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+
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+
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static int at803x_probe(struct phy_device *phydev)
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{
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struct device *dev = &phydev->mdio.dev;
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struct at803x_priv *priv;
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int ret;
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+
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+ if (at803x_mode(phydev) == AT803X_MODE_FIBER) {
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+ ret = phy_sfp_probe(phydev, &at803x_sfp_ops);
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+ if (ret < 0)
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+ return ret;
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+ }
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+
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priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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@@ -693,6 +767,7 @@ static int at803x_get_features(struct ph
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if (err)
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return err;
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+#if 0
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if (phydev->drv->phy_id != ATH8031_PHY_ID)
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return 0;
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@@ -710,6 +785,7 @@ static int at803x_get_features(struct ph
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*/
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linkmode_clear_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT,
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phydev->supported);
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+#endif
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return 0;
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}
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@@ -775,6 +851,7 @@ static int at803x_config_init(struct phy
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{
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int ret;
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+#if 0
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if (phydev->drv->phy_id == ATH8031_PHY_ID) {
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/* Some bootloaders leave the fiber page selected.
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* Switch to the copper page, as otherwise we read
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@@ -790,6 +867,7 @@ static int at803x_config_init(struct phy
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if (ret < 0)
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return ret;
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}
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+#endif
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/* The RX and TX delay default is:
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* after HW reset: RX delay enabled and TX delay disabled
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@@ -925,6 +1003,10 @@ static int at803x_read_status(struct phy
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{
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int ss, err, old_link = phydev->link;
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+ /* Handle (Fiber) SGMII to RGMII mode */
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+ if (at803x_mode(phydev) == AT803X_MODE_FIBER)
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+ return genphy_c37_read_status(phydev);
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+
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/* Update the link, but return if there was an error */
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err = genphy_update_link(phydev);
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if (err)
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@@ -1025,6 +1107,12 @@ static int at803x_config_aneg(struct phy
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{
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int ret;
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+ /* Handle (Fiber) SerDes to RGMII mode */
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+ if (at803x_mode(phydev) == AT803X_MODE_FIBER) {
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+ pr_warn("%s: fiber\n", __func__);
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+ return genphy_c37_config_aneg(phydev);
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+ }
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+
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ret = at803x_config_mdix(phydev, phydev->mdix_ctrl);
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if (ret < 0)
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return ret;
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@@ -1437,6 +1525,7 @@ static struct phy_driver at803x_driver[]
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/* Qualcomm Atheros AR8031/AR8033 */
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PHY_ID_MATCH_EXACT(ATH8031_PHY_ID),
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.name = "Qualcomm Atheros AR8031/AR8033",
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+ .config_aneg = at803x_config_aneg,
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.flags = PHY_POLL_CABLE_TEST,
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.probe = at803x_probe,
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.remove = at803x_remove,
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