128 lines
4.6 KiB
Diff
128 lines
4.6 KiB
Diff
From 67999555ff42e91de7654488d9a7735bd9e84555 Mon Sep 17 00:00:00 2001
|
|
From: Ansuel Smith <ansuelsmth@gmail.com>
|
|
Date: Sun, 10 Oct 2021 00:46:18 +0200
|
|
Subject: net: phy: at803x: better describe debug regs
|
|
|
|
Give a name to known debug regs from Documentation instead of using
|
|
unknown hex values.
|
|
|
|
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
|
|
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
|
|
Signed-off-by: David S. Miller <davem@davemloft.net>
|
|
---
|
|
drivers/net/phy/at803x.c | 30 +++++++++++++++---------------
|
|
1 file changed, 15 insertions(+), 15 deletions(-)
|
|
|
|
--- a/drivers/net/phy/at803x.c
|
|
+++ b/drivers/net/phy/at803x.c
|
|
@@ -86,12 +86,12 @@
|
|
#define AT803X_PSSR 0x11 /*PHY-Specific Status Register*/
|
|
#define AT803X_PSSR_MR_AN_COMPLETE 0x0200
|
|
|
|
-#define AT803X_DEBUG_REG_0 0x00
|
|
+#define AT803X_DEBUG_ANALOG_TEST_CTRL 0x00
|
|
#define QCA8327_DEBUG_MANU_CTRL_EN BIT(2)
|
|
#define QCA8337_DEBUG_MANU_CTRL_EN GENMASK(3, 2)
|
|
#define AT803X_DEBUG_RX_CLK_DLY_EN BIT(15)
|
|
|
|
-#define AT803X_DEBUG_REG_5 0x05
|
|
+#define AT803X_DEBUG_SYSTEM_CTRL_MODE 0x05
|
|
#define AT803X_DEBUG_TX_CLK_DLY_EN BIT(8)
|
|
|
|
#define AT803X_DEBUG_REG_HIB_CTRL 0x0b
|
|
@@ -100,7 +100,7 @@
|
|
|
|
#define AT803X_DEBUG_REG_3C 0x3C
|
|
|
|
-#define AT803X_DEBUG_REG_3D 0x3D
|
|
+#define AT803X_DEBUG_REG_GREEN 0x3D
|
|
#define AT803X_DEBUG_GATE_CLK_IN1000 BIT(6)
|
|
|
|
#define AT803X_DEBUG_REG_1F 0x1F
|
|
@@ -284,25 +284,25 @@ static int at803x_read_page(struct phy_d
|
|
|
|
static int at803x_enable_rx_delay(struct phy_device *phydev)
|
|
{
|
|
- return at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_0, 0,
|
|
+ return at803x_debug_reg_mask(phydev, AT803X_DEBUG_ANALOG_TEST_CTRL, 0,
|
|
AT803X_DEBUG_RX_CLK_DLY_EN);
|
|
}
|
|
|
|
static int at803x_enable_tx_delay(struct phy_device *phydev)
|
|
{
|
|
- return at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_5, 0,
|
|
+ return at803x_debug_reg_mask(phydev, AT803X_DEBUG_SYSTEM_CTRL_MODE, 0,
|
|
AT803X_DEBUG_TX_CLK_DLY_EN);
|
|
}
|
|
|
|
static int at803x_disable_rx_delay(struct phy_device *phydev)
|
|
{
|
|
- return at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_0,
|
|
+ return at803x_debug_reg_mask(phydev, AT803X_DEBUG_ANALOG_TEST_CTRL,
|
|
AT803X_DEBUG_RX_CLK_DLY_EN, 0);
|
|
}
|
|
|
|
static int at803x_disable_tx_delay(struct phy_device *phydev)
|
|
{
|
|
- return at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_5,
|
|
+ return at803x_debug_reg_mask(phydev, AT803X_DEBUG_SYSTEM_CTRL_MODE,
|
|
AT803X_DEBUG_TX_CLK_DLY_EN, 0);
|
|
}
|
|
|
|
@@ -1292,9 +1292,9 @@ static int qca83xx_config_init(struct ph
|
|
switch (switch_revision) {
|
|
case 1:
|
|
/* For 100M waveform */
|
|
- at803x_debug_reg_write(phydev, AT803X_DEBUG_REG_0, 0x02ea);
|
|
+ at803x_debug_reg_write(phydev, AT803X_DEBUG_ANALOG_TEST_CTRL, 0x02ea);
|
|
/* Turn on Gigabit clock */
|
|
- at803x_debug_reg_write(phydev, AT803X_DEBUG_REG_3D, 0x68a0);
|
|
+ at803x_debug_reg_write(phydev, AT803X_DEBUG_REG_GREEN, 0x68a0);
|
|
break;
|
|
|
|
case 2:
|
|
@@ -1302,8 +1302,8 @@ static int qca83xx_config_init(struct ph
|
|
fallthrough;
|
|
case 4:
|
|
phy_write_mmd(phydev, MDIO_MMD_PCS, MDIO_AZ_DEBUG, 0x803f);
|
|
- at803x_debug_reg_write(phydev, AT803X_DEBUG_REG_3D, 0x6860);
|
|
- at803x_debug_reg_write(phydev, AT803X_DEBUG_REG_5, 0x2c46);
|
|
+ at803x_debug_reg_write(phydev, AT803X_DEBUG_REG_GREEN, 0x6860);
|
|
+ at803x_debug_reg_write(phydev, AT803X_DEBUG_SYSTEM_CTRL_MODE, 0x2c46);
|
|
at803x_debug_reg_write(phydev, AT803X_DEBUG_REG_3C, 0x6000);
|
|
break;
|
|
}
|
|
@@ -1314,7 +1314,7 @@ static int qca83xx_config_init(struct ph
|
|
*/
|
|
if (phydev->drv->phy_id == QCA8327_A_PHY_ID ||
|
|
phydev->drv->phy_id == QCA8327_B_PHY_ID)
|
|
- at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_0,
|
|
+ at803x_debug_reg_mask(phydev, AT803X_DEBUG_ANALOG_TEST_CTRL,
|
|
QCA8327_DEBUG_MANU_CTRL_EN, 0);
|
|
|
|
/* Following original QCA sourcecode set port to prefer master */
|
|
@@ -1332,12 +1332,12 @@ static void qca83xx_link_change_notify(s
|
|
/* Set DAC Amplitude adjustment to +6% for 100m on link running */
|
|
if (phydev->state == PHY_RUNNING) {
|
|
if (phydev->speed == SPEED_100)
|
|
- at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_0,
|
|
+ at803x_debug_reg_mask(phydev, AT803X_DEBUG_ANALOG_TEST_CTRL,
|
|
QCA8327_DEBUG_MANU_CTRL_EN,
|
|
QCA8327_DEBUG_MANU_CTRL_EN);
|
|
} else {
|
|
/* Reset DAC Amplitude adjustment */
|
|
- at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_0,
|
|
+ at803x_debug_reg_mask(phydev, AT803X_DEBUG_ANALOG_TEST_CTRL,
|
|
QCA8327_DEBUG_MANU_CTRL_EN, 0);
|
|
}
|
|
}
|
|
@@ -1384,7 +1384,7 @@ static int qca83xx_suspend(struct phy_de
|
|
phy_modify(phydev, MII_BMCR, mask, 0);
|
|
}
|
|
|
|
- at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_3D,
|
|
+ at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_GREEN,
|
|
AT803X_DEBUG_GATE_CLK_IN1000, 0);
|
|
|
|
at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_HIB_CTRL,
|