132 lines
4.1 KiB
Diff
132 lines
4.1 KiB
Diff
From ba3c01ee02ed0d821c9f241f179bbc9457542b8f Mon Sep 17 00:00:00 2001
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From: Ansuel Smith <ansuelsmth@gmail.com>
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Date: Sun, 10 Oct 2021 00:46:15 +0200
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Subject: net: phy: at803x: fix resume for QCA8327 phy
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From Documentation phy resume triggers phy reset and restart
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auto-negotiation. Add a dedicated function to wait reset to finish as
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it was notice a regression where port sometime are not reliable after a
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suspend/resume session. The reset wait logic is copied from phy_poll_reset.
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Add dedicated suspend function to use genphy_suspend only with QCA8337
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phy and set only additional debug settings for QCA8327. With more test
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it was reported that QCA8327 doesn't proprely support this mode and
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using this cause the unreliability of the switch ports, especially the
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malfunction of the port0.
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Fixes: 15b9df4ece17 ("net: phy: at803x: add resume/suspend function to qca83xx phy")
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Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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---
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drivers/net/phy/at803x.c | 69 +++++++++++++++++++++++++++++++++++++++++++-----
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1 file changed, 63 insertions(+), 6 deletions(-)
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--- a/drivers/net/phy/at803x.c
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+++ b/drivers/net/phy/at803x.c
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@@ -92,9 +92,14 @@
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#define AT803X_DEBUG_REG_5 0x05
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#define AT803X_DEBUG_TX_CLK_DLY_EN BIT(8)
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+#define AT803X_DEBUG_REG_HIB_CTRL 0x0b
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+#define AT803X_DEBUG_HIB_CTRL_SEL_RST_80U BIT(10)
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+#define AT803X_DEBUG_HIB_CTRL_EN_ANY_CHANGE BIT(13)
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+
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#define AT803X_DEBUG_REG_3C 0x3C
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#define AT803X_DEBUG_REG_3D 0x3D
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+#define AT803X_DEBUG_GATE_CLK_IN1000 BIT(6)
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#define AT803X_DEBUG_REG_1F 0x1F
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#define AT803X_DEBUG_PLL_ON BIT(2)
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@@ -1304,6 +1309,58 @@ static int qca83xx_config_init(struct ph
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return 0;
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}
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+static int qca83xx_resume(struct phy_device *phydev)
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+{
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+ int ret, val;
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+
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+ /* Skip reset if not suspended */
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+ if (!phydev->suspended)
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+ return 0;
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+
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+ /* Reinit the port, reset values set by suspend */
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+ qca83xx_config_init(phydev);
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+
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+ /* Reset the port on port resume */
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+ phy_set_bits(phydev, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
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+
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+ /* On resume from suspend the switch execute a reset and
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+ * restart auto-negotiation. Wait for reset to complete.
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+ */
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+ ret = phy_read_poll_timeout(phydev, MII_BMCR, val, !(val & BMCR_RESET),
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+ 50000, 600000, true);
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+ if (ret)
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+ return ret;
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+
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+ msleep(1);
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+
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+ return 0;
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+}
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+
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+static int qca83xx_suspend(struct phy_device *phydev)
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+{
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+ u16 mask = 0;
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+
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+ /* Only QCA8337 support actual suspend.
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+ * QCA8327 cause port unreliability when phy suspend
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+ * is set.
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+ */
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+ if (phydev->drv->phy_id == QCA8337_PHY_ID) {
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+ genphy_suspend(phydev);
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+ } else {
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+ mask |= ~(BMCR_SPEED1000 | BMCR_FULLDPLX);
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+ phy_modify(phydev, MII_BMCR, mask, 0);
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+ }
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+
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+ at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_3D,
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+ AT803X_DEBUG_GATE_CLK_IN1000, 0);
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+
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+ at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_HIB_CTRL,
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+ AT803X_DEBUG_HIB_CTRL_EN_ANY_CHANGE |
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+ AT803X_DEBUG_HIB_CTRL_SEL_RST_80U, 0);
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+
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+ return 0;
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+}
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+
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static struct phy_driver at803x_driver[] = {
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{
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/* Qualcomm Atheros AR8035 */
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@@ -1413,8 +1470,8 @@ static struct phy_driver at803x_driver[]
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.get_sset_count = at803x_get_sset_count,
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.get_strings = at803x_get_strings,
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.get_stats = at803x_get_stats,
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- .suspend = genphy_suspend,
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- .resume = genphy_resume,
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+ .suspend = qca83xx_suspend,
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+ .resume = qca83xx_resume,
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}, {
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/* QCA8327-A from switch QCA8327-AL1A */
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.phy_id = QCA8327_A_PHY_ID,
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@@ -1428,8 +1485,8 @@ static struct phy_driver at803x_driver[]
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.get_sset_count = at803x_get_sset_count,
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.get_strings = at803x_get_strings,
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.get_stats = at803x_get_stats,
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- .suspend = genphy_suspend,
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- .resume = genphy_resume,
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+ .suspend = qca83xx_suspend,
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+ .resume = qca83xx_resume,
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}, {
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/* QCA8327-B from switch QCA8327-BL1A */
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.phy_id = QCA8327_B_PHY_ID,
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@@ -1443,8 +1500,8 @@ static struct phy_driver at803x_driver[]
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.get_sset_count = at803x_get_sset_count,
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.get_strings = at803x_get_strings,
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.get_stats = at803x_get_stats,
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- .suspend = genphy_suspend,
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- .resume = genphy_resume,
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+ .suspend = qca83xx_suspend,
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+ .resume = qca83xx_resume,
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}, };
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module_phy_driver(at803x_driver);
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