62 lines
1.9 KiB
Diff
62 lines
1.9 KiB
Diff
From 1d3e170344dff2cef8827db6c09909b78cbc11d7 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org>
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Date: Tue, 30 Nov 2021 18:29:05 +0100
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Subject: [PATCH] PCI: aardvark: Add support for DEVCAP2, DEVCTL2, LNKCAP2 and
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LNKCTL2 registers on emulated bridge
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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PCI aardvark hardware supports access to DEVCAP2, DEVCTL2, LNKCAP2 and
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LNKCTL2 configuration registers of PCIe core via PCIE_CORE_PCIEXP_CAP.
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Export them via emulated software root bridge.
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Link: https://lore.kernel.org/r/20211130172913.9727-4-kabel@kernel.org
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Signed-off-by: Pali Rohár <pali@kernel.org>
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Signed-off-by: Marek Behún <kabel@kernel.org>
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Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
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---
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drivers/pci/controller/pci-aardvark.c | 15 +++++++++++----
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1 file changed, 11 insertions(+), 4 deletions(-)
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--- a/drivers/pci/controller/pci-aardvark.c
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+++ b/drivers/pci/controller/pci-aardvark.c
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@@ -885,8 +885,13 @@ advk_pci_bridge_emul_pcie_conf_read(stru
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case PCI_EXP_DEVCAP:
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case PCI_EXP_DEVCTL:
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+ case PCI_EXP_DEVCAP2:
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+ case PCI_EXP_DEVCTL2:
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+ case PCI_EXP_LNKCAP2:
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+ case PCI_EXP_LNKCTL2:
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*value = advk_readl(pcie, PCIE_CORE_PCIEXP_CAP + reg);
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return PCI_BRIDGE_EMUL_HANDLED;
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+
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default:
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return PCI_BRIDGE_EMUL_NOT_HANDLED;
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}
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@@ -900,10 +905,6 @@ advk_pci_bridge_emul_pcie_conf_write(str
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struct advk_pcie *pcie = bridge->data;
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switch (reg) {
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- case PCI_EXP_DEVCTL:
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- advk_writel(pcie, new, PCIE_CORE_PCIEXP_CAP + reg);
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- break;
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-
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case PCI_EXP_LNKCTL:
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advk_writel(pcie, new, PCIE_CORE_PCIEXP_CAP + reg);
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if (new & PCI_EXP_LNKCTL_RL)
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@@ -925,6 +926,12 @@ advk_pci_bridge_emul_pcie_conf_write(str
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advk_writel(pcie, new, PCIE_ISR0_REG);
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break;
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+ case PCI_EXP_DEVCTL:
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+ case PCI_EXP_DEVCTL2:
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+ case PCI_EXP_LNKCTL2:
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+ advk_writel(pcie, new, PCIE_CORE_PCIEXP_CAP + reg);
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+ break;
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+
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default:
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break;
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}
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