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Qualcomm Atheros IPQ807x is a modern WiSoC featuring: * Quad Core ARMv8 Cortex A-53 * @ 2.2 GHz (IPQ8072A/4A/6A/8A) Codename Hawkeye * @ 1.4 GHz (IPQ8070A/1A) Codename Acorn * Dual Band simultaneaous IEEE 802.11ax * 5G: 8x8/80 or 4x4/160MHz (IPQ8074A/8A) * 5G: 4x4/80 or 2x2/160MHz (IPQ8071A/2A/6A) * 5G: 2x2/80MHz (IPQ8070A) * 2G: 4x4/40MHz (IPQ8072A/4A/6A/8A) * 2G: 2x2/40MHz (IPQ8070A/1A) * 1x PSGMII via QCA8072/5 (Max 5x 1GbE ports) * 2x SGMII/USXGMII (1/2.5/5/10 GbE) on Hawkeye * 2x SGMII/USXGMII (1/2.5/5 GbE) on Acorn * DDR3L/4 32/16 bit up to 2400MT/s * SDIO 3.0/SD card 3.0/eMMC 5.1 * Dual USB 3.0 * One PCIe Gen2.1 and one PCIe Gen3.0 port (Single lane) * Parallel NAND (ONFI)/LCD * 6x QUP BLSP SPI/I2C/UART * I2S, PCM, and TDMA * HW PWM * 1.8V configurable GPIO * Companion PMP8074 PMIC via SPMI (GPIOS, RTC etc) Note that only v2 SOC models aka the ones ending with A suffix are supported, v1 models do not comply to the final 802.11ax and have lower clocks, lack the Gen3 PCIe etc. SoC itself has two UBI32 cores for the NSS offloading system, however currently no offloading is supported. Signed-off-by: Robert Marko <robimarko@gmail.com>
41 lines
1.4 KiB
Diff
41 lines
1.4 KiB
Diff
From d22c8f1bd94602d1bf2b377c3befe54e749b963d Mon Sep 17 00:00:00 2001
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From: Robert Marko <robimarko@gmail.com>
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Date: Fri, 19 Aug 2022 00:06:25 +0200
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Subject: [PATCH] clk: qcom: apss-ipq-pll: update IPQ6018 Alpha PLL config
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Update the IPQ6018 Alpha PLL config to the latest one from the downstream
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5.4 kernel[1].
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This one should match the production SoC-s.
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Tested on IPQ6018 CP01-C1 reference board.
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[1] https://git.codelinaro.org/clo/qsdk/oss/kernel/linux-ipq-5.4/-/blob/NHSS.QSDK.12.1.r4/drivers/clk/qcom/apss-ipq-pll.c#L41
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Signed-off-by: Robert Marko <robimarko@gmail.com>
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Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Link: https://lore.kernel.org/r/20220818220628.339366-6-robimarko@gmail.com
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---
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drivers/clk/qcom/apss-ipq-pll.c | 8 ++++++--
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1 file changed, 6 insertions(+), 2 deletions(-)
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--- a/drivers/clk/qcom/apss-ipq-pll.c
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+++ b/drivers/clk/qcom/apss-ipq-pll.c
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@@ -39,10 +39,14 @@ static struct clk_alpha_pll ipq_pll = {
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static const struct alpha_pll_config ipq6018_pll_config = {
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.l = 0x37,
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- .config_ctl_val = 0x04141200,
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- .config_ctl_hi_val = 0x0,
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+ .config_ctl_val = 0x240d4828,
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+ .config_ctl_hi_val = 0x6,
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.early_output_mask = BIT(3),
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+ .aux2_output_mask = BIT(2),
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+ .aux_output_mask = BIT(1),
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.main_output_mask = BIT(0),
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+ .test_ctl_val = 0x1c0000C0,
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+ .test_ctl_hi_val = 0x4000,
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};
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static const struct regmap_config ipq_pll_regmap_config = {
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