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b04f245c39
Changelog: https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.6.23 Removed upstreamed: pending-6.6/735-net-mediatek-mtk_eth_soc-release-MAC_MCR_FORCE_LINK-.patch[1] pending-6.6/736-net-ethernet-mtk_eth_soc-fix-PPE-hanging-issue.patch[2] mediatek/patches-6.6/232-clk-mediatek-mt7981-topckgen-flag-SGM_REG_SEL-as-cri.patch[3] Manually rebased: mediatek/patches-6.6/100-dts-update-mt7622-rfb1.patch Added: generic/backports-6.6/981-mtd-spinand-Add-support-for-5-byte-IDs.patch[4] All other patches automatically rebased. 1. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.6.23&id=1f32abb474c1c9bdb21d9eda74c325a0b3a162e5 2. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.6.23&id=943c14ece95eb1cf98d477462aebcbfdfd714633 3. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.6.23&id=6ff01b314149d1cf59caebc29384f0beed21cba4 4. See comments in https://github.com/openwrt/openwrt/pull/14992 regarding broken flogic/xiaomi_redmi-router-ax6000-ubootmod Build system: x86/64 Build-tested: x86/64/AMD Cezanne, flogic/xiaomi_redmi-router-ax6000-ubootmod, flogic/glinet_gl-mt6000 Run-tested: x86/64/AMD Cezannei, flogic/xiaomi_redmi-router-ax6000-ubootmod, flogic/glinet_gl-mt6000 Signed-off-by: John Audia <therealgraysky@proton.me>
29 lines
932 B
Diff
29 lines
932 B
Diff
From 3fb8841513c4ec3a2e5d366df86230c45f239a57 Mon Sep 17 00:00:00 2001
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From: Alexander Couzens <lynxis@fe80.eu>
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Date: Sat, 13 Aug 2022 13:08:22 +0200
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Subject: [PATCH 03/10] net: mt7531: ensure all MACs are powered down before
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reset
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The datasheet [1] explicit describes it as requirement for a reset.
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[1] MT7531 Reference Manual for Development Board rev 1.0, page 735
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Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
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---
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drivers/net/dsa/mt7530.c | 4 ++++
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1 file changed, 4 insertions(+)
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--- a/drivers/net/dsa/mt7530.c
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+++ b/drivers/net/dsa/mt7530.c
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@@ -2304,6 +2304,10 @@ mt7530_setup(struct dsa_switch *ds)
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return -ENODEV;
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}
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+ /* all MACs must be forced link-down before sw reset */
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+ for (i = 0; i < MT7530_NUM_PORTS; i++)
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+ mt7530_write(priv, MT7530_PMCR_P(i), MT7531_FORCE_LNK);
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+
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/* Reset the switch through internal reset */
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mt7530_write(priv, MT7530_SYS_CTRL,
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SYS_CTRL_PHY_RST | SYS_CTRL_SW_RST |
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