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a9b6077402
* Refreshed patches Compile-tested: ar71xx, ramips/mt7621, x86/64 Run-tested: ar71xx Signed-off-by: Stijn Segers <foss@volatilesystems.org>
28 lines
991 B
Diff
28 lines
991 B
Diff
From 514dc56068291b52b6f8bb2fe29d8755d6126283 Mon Sep 17 00:00:00 2001
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From: Boris Brezillon <boris.brezillon@free-electrons.com>
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Date: Tue, 22 Nov 2016 12:45:28 -0800
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Subject: [PATCH] clk: bcm2835: Fix ->fixed_divider of pllh_aux
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There is no fixed divider on pllh_aux.
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Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Signed-off-by: Eric Anholt <eric@anholt.net>
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Reviewed-by: Eric Anholt <eric@anholt.net>
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Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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(cherry picked from commit f2a46926aba1f0c33944901d2420a6a887455ddc)
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---
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drivers/clk/bcm/clk-bcm2835.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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--- a/drivers/clk/bcm/clk-bcm2835.c
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+++ b/drivers/clk/bcm/clk-bcm2835.c
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@@ -1661,7 +1661,7 @@ static const struct bcm2835_clk_desc clk
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.a2w_reg = A2W_PLLH_AUX,
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.load_mask = CM_PLLH_LOADAUX,
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.hold_mask = 0,
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- .fixed_divider = 10),
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+ .fixed_divider = 1),
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[BCM2835_PLLH_PIX] = REGISTER_PLL_DIV(
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.name = "pllh_pix",
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.source_pll = "pllh",
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