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openwrt/target/linux/brcm2708/patches-4.4/0254-clk-bcm2835-Add-PWM-clock-support.patch
Stijn Segers a9b6077402 kernel: bump kernel 4.4 to 4.4.126 for 17.01
* Refreshed patches

Compile-tested: ar71xx, ramips/mt7621, x86/64
Run-tested: ar71xx

Signed-off-by: Stijn Segers <foss@volatilesystems.org>
2018-04-14 14:52:49 +02:00

56 lines
1.7 KiB
Diff

From ab4de687cdad0adbc555237364e5a8e2cdef5144 Mon Sep 17 00:00:00 2001
From: Remi Pommarel <repk@triplefau.lt>
Date: Sun, 6 Dec 2015 17:22:48 +0100
Subject: [PATCH] clk: bcm2835: Add PWM clock support
Register the pwm clock for bcm2835.
Signed-off-by: Remi Pommarel <repk@triplefau.lt>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
(cherry picked from commit cfbab8fbab9c330aca963095a439c451ac97c0dd)
---
drivers/clk/bcm/clk-bcm2835.c | 13 +++++++++++++
include/dt-bindings/clock/bcm2835.h | 3 ++-
2 files changed, 15 insertions(+), 1 deletion(-)
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -807,6 +807,16 @@ static const struct bcm2835_clock_data b
.frac_bits = 8,
};
+static const struct bcm2835_clock_data bcm2835_clock_pwm_data = {
+ .name = "pwm",
+ .num_mux_parents = ARRAY_SIZE(bcm2835_clock_per_parents),
+ .parents = bcm2835_clock_per_parents,
+ .ctl_reg = CM_PWMCTL,
+ .div_reg = CM_PWMDIV,
+ .int_bits = 12,
+ .frac_bits = 12,
+};
+
struct bcm2835_pll {
struct clk_hw hw;
struct bcm2835_cprman *cprman;
@@ -1607,6 +1617,9 @@ static int bcm2835_clk_probe(struct plat
cprman->regs + CM_PERIICTL, CM_GATE_BIT,
0, &cprman->regs_lock);
+ clks[BCM2835_CLOCK_PWM] =
+ bcm2835_register_clock(cprman, &bcm2835_clock_pwm_data);
+
return of_clk_add_provider(dev->of_node, of_clk_src_onecell_get,
&cprman->onecell);
}
--- a/include/dt-bindings/clock/bcm2835.h
+++ b/include/dt-bindings/clock/bcm2835.h
@@ -43,5 +43,6 @@
#define BCM2835_CLOCK_TSENS 27
#define BCM2835_CLOCK_EMMC 28
#define BCM2835_CLOCK_PERI_IMAGE 29
+#define BCM2835_CLOCK_PWM 30
-#define BCM2835_CLOCK_COUNT 30
+#define BCM2835_CLOCK_COUNT 31