mirror of
https://git.openwrt.org/openwrt/openwrt.git
synced 2024-06-20 23:58:27 +02:00
7774b86019
Add the missing pinctrl properties on the ethernet node. GMAC1 will start working with this change. Link: https://lore.kernel.org/netdev/83a35aa3-6cb8-2bc4-2ff4-64278bbcd8c8@arinc9.com/ Overwrite pinctrl-0 property without rgmii2_pins on devicetrees which use the rgmii2 pins as GPIO (22 - 33). Give gpio function to rgmii2 pin group on mt7621_tplink_archer-x6-v3.dtsi which uses GPIO 28. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
170 lines
2.5 KiB
Plaintext
170 lines
2.5 KiB
Plaintext
#include "mt7621.dtsi"
|
|
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
#include <dt-bindings/input/input.h>
|
|
|
|
/ {
|
|
aliases {
|
|
label-mac-device = &wan;
|
|
};
|
|
|
|
leds {
|
|
compatible = "gpio-leds";
|
|
|
|
usb {
|
|
label = "green:usb";
|
|
gpios = <&gpio 27 GPIO_ACTIVE_LOW>;
|
|
trigger-sources = <&xhci_ehci_port1>, <&ehci_port2>;
|
|
linux,default-trigger = "usbport";
|
|
};
|
|
};
|
|
|
|
keys {
|
|
compatible = "gpio-keys";
|
|
|
|
reset {
|
|
label = "reset";
|
|
gpios = <&gpio 29 GPIO_ACTIVE_LOW>;
|
|
linux,code = <KEY_RESTART>;
|
|
};
|
|
|
|
wps {
|
|
label = "wps";
|
|
gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
|
|
linux,code = <KEY_WPS_BUTTON>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&spi0 {
|
|
status = "okay";
|
|
|
|
flash@0 {
|
|
compatible = "jedec,spi-nor";
|
|
reg = <0>;
|
|
spi-max-frequency = <80000000>;
|
|
m25p,fast-read;
|
|
|
|
partitions {
|
|
compatible = "fixed-partitions";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
partition@0 {
|
|
label = "u-boot";
|
|
reg = <0x0 0x30000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@30000 {
|
|
label = "u-boot-env";
|
|
reg = <0x30000 0x10000>;
|
|
read-only;
|
|
};
|
|
|
|
factory: partition@40000 {
|
|
label = "factory";
|
|
reg = <0x40000 0x10000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@50000 {
|
|
compatible = "denx,uimage";
|
|
label = "firmware";
|
|
reg = <0x50000 0xfb0000>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&pcie {
|
|
status = "okay";
|
|
};
|
|
|
|
&pcie0 {
|
|
wifi@0,0 {
|
|
compatible = "mediatek,mt76";
|
|
reg = <0x0000 0 0 0 0>;
|
|
mediatek,mtd-eeprom = <&factory 0x0>;
|
|
|
|
led {
|
|
led-sources = <0>;
|
|
led-active-low;
|
|
};
|
|
};
|
|
};
|
|
|
|
&pcie1 {
|
|
wifi@0,0 {
|
|
compatible = "mediatek,mt76";
|
|
reg = <0x0000 0 0 0 0>;
|
|
mediatek,mtd-eeprom = <&factory 0x8000>;
|
|
ieee80211-freq-limit = <5000000 6000000>;
|
|
|
|
led {
|
|
led-sources = <2>;
|
|
led-active-low;
|
|
};
|
|
};
|
|
};
|
|
|
|
ðernet {
|
|
pinctrl-0 = <&mdio_pins>, <&rgmii1_pins>;
|
|
};
|
|
|
|
&gmac0 {
|
|
nvmem-cells = <&macaddr_factory_e000>;
|
|
nvmem-cell-names = "mac-address";
|
|
};
|
|
|
|
&switch0 {
|
|
ports {
|
|
port@0 {
|
|
status = "okay";
|
|
label = "lan4";
|
|
};
|
|
|
|
port@1 {
|
|
status = "okay";
|
|
label = "lan3";
|
|
};
|
|
|
|
port@2 {
|
|
status = "okay";
|
|
label = "lan2";
|
|
};
|
|
|
|
port@3 {
|
|
status = "okay";
|
|
label = "lan1";
|
|
};
|
|
wan: port@4 {
|
|
status = "okay";
|
|
label = "wan";
|
|
nvmem-cells = <&macaddr_factory_2e>;
|
|
nvmem-cell-names = "mac-address";
|
|
};
|
|
};
|
|
};
|
|
|
|
&state_default {
|
|
gpio {
|
|
groups = "wdt", "rgmii2";
|
|
function = "gpio";
|
|
};
|
|
};
|
|
|
|
&factory {
|
|
compatible = "nvmem-cells";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
macaddr_factory_2e: macaddr@2e {
|
|
reg = <0x2e 0x6>;
|
|
};
|
|
|
|
macaddr_factory_e000: macaddr@e000 {
|
|
reg = <0xe000 0x6>;
|
|
};
|
|
};
|