49 lines
1.7 KiB
Diff
49 lines
1.7 KiB
Diff
From fea7cfb83d1a2782e39cd101dd44ed2548539de5 Mon Sep 17 00:00:00 2001
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From: Luo Jie <quic_luoj@quicinc.com>
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Date: Sun, 16 Jul 2023 16:49:22 +0800
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Subject: [PATCH 4/6] net: phy: at803x: support qca8081 1G chip type
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The qca8081 1G chip version does not support 2.5 capability, which
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is distinguished from qca8081 2.5G chip according to the bit0 of
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register mmd7.0x901d, the 1G version chip also has the same PHY ID
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as the normal qca8081 2.5G chip.
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Signed-off-by: Luo Jie <quic_luoj@quicinc.com>
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Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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---
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drivers/net/phy/at803x.c | 15 +++++++++++++++
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1 file changed, 15 insertions(+)
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--- a/drivers/net/phy/at803x.c
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+++ b/drivers/net/phy/at803x.c
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@@ -272,6 +272,10 @@
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#define QCA808X_CDT_STATUS_STAT_OPEN 2
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#define QCA808X_CDT_STATUS_STAT_SHORT 3
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+/* QCA808X 1G chip type */
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+#define QCA808X_PHY_MMD7_CHIP_TYPE 0x901d
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+#define QCA808X_PHY_CHIP_TYPE_1G BIT(0)
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+
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MODULE_DESCRIPTION("Qualcomm Atheros AR803x and QCA808X PHY driver");
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MODULE_AUTHOR("Matus Ujhelyi");
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MODULE_LICENSE("GPL");
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@@ -2005,6 +2009,17 @@ static int qca808x_get_features(struct p
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*/
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linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, phydev->supported);
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+ /* As for the qca8081 1G version chip, the 2500baseT ability is also
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+ * existed in the bit0 of MMD1.21, we need to remove it manually if
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+ * it is the qca8081 1G chip according to the bit0 of MMD7.0x901d.
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+ */
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+ ret = phy_read_mmd(phydev, MDIO_MMD_AN, QCA808X_PHY_MMD7_CHIP_TYPE);
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+ if (ret < 0)
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+ return ret;
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+
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+ if (QCA808X_PHY_CHIP_TYPE_1G & ret)
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+ linkmode_clear_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, phydev->supported);
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+
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return 0;
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}
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