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cddd459140
Add patches for linux-5.4. The patches are from NXP LSDK-20.04 release which was tagged LSDK-20.04-V5.4. https://source.codeaurora.org/external/qoriq/qoriq-components/linux/ For boards LS1021A-IOT, and Traverse-LS1043 which are not involved in LSDK, port the dts patches from 4.14. The patches are sorted into the following categories: 301-arch-xxxx 302-dts-xxxx 303-core-xxxx 701-net-xxxx 801-audio-xxxx 802-can-xxxx 803-clock-xxxx 804-crypto-xxxx 805-display-xxxx 806-dma-xxxx 807-gpio-xxxx 808-i2c-xxxx 809-jailhouse-xxxx 810-keys-xxxx 811-kvm-xxxx 812-pcie-xxxx 813-pm-xxxx 814-qe-xxxx 815-sata-xxxx 816-sdhc-xxxx 817-spi-xxxx 818-thermal-xxxx 819-uart-xxxx 820-usb-xxxx 821-vfio-xxxx Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
48 lines
1.4 KiB
Diff
48 lines
1.4 KiB
Diff
From 7e92994ec22c9d337f6012ac913e7958012ad52e Mon Sep 17 00:00:00 2001
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From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
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Date: Tue, 25 Jun 2019 09:09:28 +0000
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Subject: [PATCH] PCI: mobiveil: Add 8-bit and 16-bit CSR register accessors
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There are some 8-bit and 16-bit registers in PCIe configuration
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space, so add these accessors accordingly.
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Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
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Reviewed-by: Minghuan Lian <Minghuan.Lian@nxp.com>
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Reviewed-by: Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in>
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---
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drivers/pci/controller/mobiveil/pcie-mobiveil.h | 20 ++++++++++++++++++++
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1 file changed, 20 insertions(+)
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--- a/drivers/pci/controller/mobiveil/pcie-mobiveil.h
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+++ b/drivers/pci/controller/mobiveil/pcie-mobiveil.h
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@@ -182,9 +182,29 @@ static inline u32 csr_readl(struct mobiv
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return csr_read(pcie, off, 0x4);
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}
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+static inline u32 csr_readw(struct mobiveil_pcie *pcie, u32 off)
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+{
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+ return csr_read(pcie, off, 0x2);
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+}
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+
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+static inline u32 csr_readb(struct mobiveil_pcie *pcie, u32 off)
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+{
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+ return csr_read(pcie, off, 0x1);
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+}
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+
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static inline void csr_writel(struct mobiveil_pcie *pcie, u32 val, u32 off)
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{
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csr_write(pcie, val, off, 0x4);
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}
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+static inline void csr_writew(struct mobiveil_pcie *pcie, u32 val, u32 off)
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+{
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+ csr_write(pcie, val, off, 0x2);
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+}
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+
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+static inline void csr_writeb(struct mobiveil_pcie *pcie, u32 val, u32 off)
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+{
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+ csr_write(pcie, val, off, 0x1);
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+}
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+
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#endif /* _PCIE_MOBIVEIL_H */
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