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https://git.openwrt.org/openwrt/openwrt.git
synced 2024-06-20 23:58:27 +02:00
2b88563ee5
* rename the target to realtek * add refactored DSA driver * add latest gpio driver * lots of arch cleanups * new irq driver * additional boards Signed-off-by: Bert Vermeulen <bert@biot.com> Signed-off-by: Birger Koblitz <mail@birger-koblitz.de> Signed-off-by: Sander Vanheule <sander@svanheule.net> Signed-off-by: Bjørn Mork <bjorn@mork.no> Signed-off-by: John Crispin <john@phrozen.org>
42 lines
1.1 KiB
Diff
42 lines
1.1 KiB
Diff
--- a/drivers/net/phy/phylink.c
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+++ b/drivers/net/phy/phylink.c
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@@ -1242,6 +1242,11 @@ int phylink_ethtool_ksettings_set(struct
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/* If we have a PHY, configure the phy */
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if (pl->phydev) {
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+ if (pl->phydev->drv->get_port && pl->phydev->drv->set_port) {
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+ if(pl->phydev->drv->get_port(pl->phydev) != kset->base.port) {
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+ pl->phydev->drv->set_port(pl->phydev, kset->base.port);
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+ }
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+ }
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ret = phy_ethtool_ksettings_set(pl->phydev, &our_kset);
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if (ret)
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return ret;
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@@ -1420,8 +1425,11 @@ int phylink_ethtool_get_eee(struct phyli
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ASSERT_RTNL();
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- if (pl->phydev)
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+ if (pl->phydev) {
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+ if (pl->phydev->drv->get_eee)
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+ return pl->phydev->drv->get_eee(pl->phydev, eee);
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ret = phy_ethtool_get_eee(pl->phydev, eee);
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+ }
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return ret;
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}
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@@ -1438,9 +1446,11 @@ int phylink_ethtool_set_eee(struct phyli
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ASSERT_RTNL();
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- if (pl->phydev)
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+ if (pl->phydev) {
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+ if (pl->phydev->drv->set_eee)
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+ return pl->phydev->drv->set_eee(pl->phydev, eee);
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ret = phy_ethtool_set_eee(pl->phydev, eee);
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-
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+ }
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return ret;
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}
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EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee);
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