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f2f42a54e8
The qca8k patch series brings the numbering to 799. This patch renames 7xx patches to create space for more backports to be added. Signed-off-by: Matthew Hagan <mnhagan88@gmail.com> [rename 729->719] Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
162 lines
4.7 KiB
Diff
162 lines
4.7 KiB
Diff
From b697d9d38a5a5ab405d7cc4743d39fe2c5d7517c Mon Sep 17 00:00:00 2001
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From: Ivan Bornyakov <i.bornyakov@metrotek.ru>
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Date: Thu, 12 Aug 2021 16:42:56 +0300
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Subject: [PATCH] net: phy: marvell: add SFP support for 88E1510
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Add support for SFP cages connected to the Marvell 88E1512 transceiver.
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88E1512 supports for SGMII/1000Base-X/100Base-FX media type with RGMII
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on system interface. Configure PHY to appropriate mode depending on the
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type of SFP inserted. On SFP removal configure PHY to the RGMII-copper
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mode so RJ-45 port can still work.
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Signed-off-by: Ivan Bornyakov <i.bornyakov@metrotek.ru>
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Link: https://lore.kernel.org/r/20210812134256.2436-1-i.bornyakov@metrotek.ru
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Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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---
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drivers/net/phy/marvell.c | 105 +++++++++++++++++++++++++++++++++++++-
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1 file changed, 104 insertions(+), 1 deletion(-)
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--- a/drivers/net/phy/marvell.c
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+++ b/drivers/net/phy/marvell.c
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@@ -32,6 +32,7 @@
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#include <linux/marvell_phy.h>
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#include <linux/bitfield.h>
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#include <linux/of.h>
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+#include <linux/sfp.h>
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#include <linux/io.h>
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#include <asm/irq.h>
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@@ -46,6 +47,7 @@
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#define MII_MARVELL_MISC_TEST_PAGE 0x06
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#define MII_MARVELL_VCT7_PAGE 0x07
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#define MII_MARVELL_WOL_PAGE 0x11
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+#define MII_MARVELL_MODE_PAGE 0x12
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#define MII_M1011_IEVENT 0x13
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#define MII_M1011_IEVENT_CLEAR 0x0000
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@@ -162,7 +164,14 @@
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#define MII_88E1510_GEN_CTRL_REG_1 0x14
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#define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7
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+#define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII 0x0 /* RGMII to copper */
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#define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */
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+/* RGMII to 1000BASE-X */
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+#define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_1000X 0x2
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+/* RGMII to 100BASE-FX */
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+#define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_100FX 0x3
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+/* RGMII to SGMII */
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+#define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_SGMII 0x4
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#define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */
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#define MII_VCT5_TX_RX_MDI0_COUPLING 0x10
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@@ -2498,6 +2507,100 @@ static int marvell_probe(struct phy_devi
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return marvell_hwmon_probe(phydev);
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}
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+static int m88e1510_sfp_insert(void *upstream, const struct sfp_eeprom_id *id)
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+{
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+ struct phy_device *phydev = upstream;
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+ phy_interface_t interface;
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+ struct device *dev;
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+ int oldpage;
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+ int ret = 0;
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+ u16 mode;
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+
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+ __ETHTOOL_DECLARE_LINK_MODE_MASK(supported) = { 0, };
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+
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+ dev = &phydev->mdio.dev;
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+
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+ sfp_parse_support(phydev->sfp_bus, id, supported);
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+ interface = sfp_select_interface(phydev->sfp_bus, supported);
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+
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+ dev_info(dev, "%s SFP module inserted\n", phy_modes(interface));
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+
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+ switch (interface) {
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+ case PHY_INTERFACE_MODE_1000BASEX:
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+ mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_1000X;
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+
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+ break;
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+ case PHY_INTERFACE_MODE_100BASEX:
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+ mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_100FX;
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+
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+ break;
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+ case PHY_INTERFACE_MODE_SGMII:
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+ mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_SGMII;
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+
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+ break;
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+ default:
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+ dev_err(dev, "Incompatible SFP module inserted\n");
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+
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+ return -EINVAL;
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+ }
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+
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+ oldpage = phy_select_page(phydev, MII_MARVELL_MODE_PAGE);
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+ if (oldpage < 0)
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+ goto error;
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+
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+ ret = __phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
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+ MII_88E1510_GEN_CTRL_REG_1_MODE_MASK, mode);
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+ if (ret < 0)
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+ goto error;
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+
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+ ret = __phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1,
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+ MII_88E1510_GEN_CTRL_REG_1_RESET);
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+
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+error:
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+ return phy_restore_page(phydev, oldpage, ret);
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+}
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+
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+static void m88e1510_sfp_remove(void *upstream)
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+{
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+ struct phy_device *phydev = upstream;
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+ int oldpage;
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+ int ret = 0;
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+
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+ oldpage = phy_select_page(phydev, MII_MARVELL_MODE_PAGE);
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+ if (oldpage < 0)
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+ goto error;
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+
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+ ret = __phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
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+ MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
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+ MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII);
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+ if (ret < 0)
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+ goto error;
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+
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+ ret = __phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1,
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+ MII_88E1510_GEN_CTRL_REG_1_RESET);
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+
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+error:
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+ phy_restore_page(phydev, oldpage, ret);
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+}
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+
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+static const struct sfp_upstream_ops m88e1510_sfp_ops = {
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+ .module_insert = m88e1510_sfp_insert,
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+ .module_remove = m88e1510_sfp_remove,
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+ .attach = phy_sfp_attach,
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+ .detach = phy_sfp_detach,
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+};
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+
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+static int m88e1510_probe(struct phy_device *phydev)
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+{
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+ int err;
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+
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+ err = marvell_probe(phydev);
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+ if (err)
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+ return err;
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+
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+ return phy_sfp_probe(phydev, &m88e1510_sfp_ops);
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+}
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+
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static struct phy_driver marvell_drivers[] = {
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{
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.phy_id = MARVELL_PHY_ID_88E1101,
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@@ -2704,7 +2807,7 @@ static struct phy_driver marvell_drivers
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.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
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.features = PHY_GBIT_FIBRE_FEATURES,
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.flags = PHY_POLL_CABLE_TEST,
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- .probe = marvell_probe,
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+ .probe = m88e1510_probe,
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.config_init = m88e1510_config_init,
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.config_aneg = m88e1510_config_aneg,
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.read_status = marvell_read_status,
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