228 lines
7.2 KiB
Diff
228 lines
7.2 KiB
Diff
From 8f7db12efc189eedd196ed8d053236ce27add484 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com>
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Date: Mon, 22 Jan 2024 08:35:54 +0300
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Subject: [PATCH 07/30] net: dsa: mt7530: store port 5 SGMII capability of
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MT7531
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Introduce the p5_sgmii field to store the information for whether port 5
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has got SGMII or not. Instead of reading the MT7531_TOP_SIG_SR register
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multiple times, the register will be read once and the value will be
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stored on the p5_sgmii field. This saves unnecessary reads of the
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register.
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Move the comment about MT7531AE and MT7531BE to mt7531_setup(), where the
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switch is identified.
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Get rid of mt7531_dual_sgmii_supported() now that priv->p5_sgmii stores the
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information. Address the code where mt7531_dual_sgmii_supported() is used.
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Get rid of mt7531_is_rgmii_port() which just prints the opposite of
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priv->p5_sgmii.
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Instead of calling mt7531_pll_setup() then returning, do not call it if
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port 5 is SGMII.
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Remove P5_INTF_SEL_GMAC5_SGMII. The p5_interface_select enum is supposed to
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represent the mode that port 5 is being used in, not the hardware
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information of port 5. Set p5_intf_sel to P5_INTF_SEL_GMAC5 instead, if
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port 5 is not dsa_is_unused_port().
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Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
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Acked-by: Daniel Golle <daniel@makrotopia.org>
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Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
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Link: https://lore.kernel.org/r/20240122-for-netnext-mt7530-improvements-1-v3-3-042401f2b279@arinc9.com
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Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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---
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drivers/net/dsa/mt7530-mdio.c | 7 ++---
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drivers/net/dsa/mt7530.c | 48 ++++++++++++-----------------------
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drivers/net/dsa/mt7530.h | 6 +++--
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3 files changed, 22 insertions(+), 39 deletions(-)
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--- a/drivers/net/dsa/mt7530-mdio.c
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+++ b/drivers/net/dsa/mt7530-mdio.c
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@@ -81,17 +81,14 @@ static const struct regmap_bus mt7530_re
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};
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static int
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-mt7531_create_sgmii(struct mt7530_priv *priv, bool dual_sgmii)
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+mt7531_create_sgmii(struct mt7530_priv *priv)
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{
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struct regmap_config *mt7531_pcs_config[2] = {};
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struct phylink_pcs *pcs;
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struct regmap *regmap;
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int i, ret = 0;
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- /* MT7531AE has two SGMII units for port 5 and port 6
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- * MT7531BE has only one SGMII unit for port 6
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- */
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- for (i = dual_sgmii ? 0 : 1; i < 2; i++) {
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+ for (i = priv->p5_sgmii ? 0 : 1; i < 2; i++) {
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mt7531_pcs_config[i] = devm_kzalloc(priv->dev,
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sizeof(struct regmap_config),
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GFP_KERNEL);
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--- a/drivers/net/dsa/mt7530.c
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+++ b/drivers/net/dsa/mt7530.c
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@@ -487,15 +487,6 @@ mt7530_pad_clk_setup(struct dsa_switch *
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return 0;
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}
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-static bool mt7531_dual_sgmii_supported(struct mt7530_priv *priv)
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-{
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- u32 val;
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-
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- val = mt7530_read(priv, MT7531_TOP_SIG_SR);
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-
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- return (val & PAD_DUAL_SGMII_EN) != 0;
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-}
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-
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static int
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mt7531_pad_setup(struct dsa_switch *ds, phy_interface_t interface)
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{
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@@ -510,9 +501,6 @@ mt7531_pll_setup(struct mt7530_priv *pri
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u32 xtal;
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u32 val;
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- if (mt7531_dual_sgmii_supported(priv))
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- return;
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-
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val = mt7530_read(priv, MT7531_CREV);
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top_sig = mt7530_read(priv, MT7531_TOP_SIG_SR);
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hwstrap = mt7530_read(priv, MT7531_HWTRAP);
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@@ -920,8 +908,6 @@ static const char *p5_intf_modes(unsigne
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return "PHY P4";
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case P5_INTF_SEL_GMAC5:
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return "GMAC5";
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- case P5_INTF_SEL_GMAC5_SGMII:
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- return "GMAC5_SGMII";
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default:
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return "unknown";
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}
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@@ -2685,6 +2671,12 @@ mt7531_setup(struct dsa_switch *ds)
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return -ENODEV;
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}
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+ /* MT7531AE has got two SGMII units. One for port 5, one for port 6.
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+ * MT7531BE has got only one SGMII unit which is for port 6.
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+ */
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+ val = mt7530_read(priv, MT7531_TOP_SIG_SR);
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+ priv->p5_sgmii = !!(val & PAD_DUAL_SGMII_EN);
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+
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/* all MACs must be forced link-down before sw reset */
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for (i = 0; i < MT7530_NUM_PORTS; i++)
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mt7530_write(priv, MT7530_PMCR_P(i), MT7531_FORCE_LNK);
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@@ -2694,21 +2686,18 @@ mt7531_setup(struct dsa_switch *ds)
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SYS_CTRL_PHY_RST | SYS_CTRL_SW_RST |
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SYS_CTRL_REG_RST);
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- mt7531_pll_setup(priv);
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-
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- if (mt7531_dual_sgmii_supported(priv)) {
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- priv->p5_intf_sel = P5_INTF_SEL_GMAC5_SGMII;
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-
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+ if (!priv->p5_sgmii) {
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+ mt7531_pll_setup(priv);
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+ } else {
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/* Let ds->slave_mii_bus be able to access external phy. */
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mt7530_rmw(priv, MT7531_GPIO_MODE1, MT7531_GPIO11_RG_RXD2_MASK,
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MT7531_EXT_P_MDC_11);
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mt7530_rmw(priv, MT7531_GPIO_MODE1, MT7531_GPIO12_RG_RXD3_MASK,
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MT7531_EXT_P_MDIO_12);
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- } else {
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- priv->p5_intf_sel = P5_INTF_SEL_GMAC5;
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}
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- dev_dbg(ds->dev, "P5 support %s interface\n",
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- p5_intf_modes(priv->p5_intf_sel));
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+
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+ if (!dsa_is_unused_port(ds, 5))
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+ priv->p5_intf_sel = P5_INTF_SEL_GMAC5;
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mt7530_rmw(priv, MT7531_GPIO_MODE0, MT7531_GPIO0_MASK,
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MT7531_GPIO0_INTERRUPT);
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@@ -2768,11 +2757,6 @@ static void mt7530_mac_port_get_caps(str
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}
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}
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-static bool mt7531_is_rgmii_port(struct mt7530_priv *priv, u32 port)
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-{
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- return (port == 5) && (priv->p5_intf_sel != P5_INTF_SEL_GMAC5_SGMII);
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-}
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-
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static void mt7531_mac_port_get_caps(struct dsa_switch *ds, int port,
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struct phylink_config *config)
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{
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@@ -2785,7 +2769,7 @@ static void mt7531_mac_port_get_caps(str
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break;
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case 5: /* 2nd cpu port supports either rgmii or sgmii/8023z */
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- if (mt7531_is_rgmii_port(priv, port)) {
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+ if (!priv->p5_sgmii) {
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phy_interface_set_rgmii(config->supported_interfaces);
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break;
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}
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@@ -2852,7 +2836,7 @@ static int mt7531_rgmii_setup(struct mt7
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{
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u32 val;
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- if (!mt7531_is_rgmii_port(priv, port)) {
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+ if (priv->p5_sgmii) {
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dev_err(priv->dev, "RGMII mode is not available for port %d\n",
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port);
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return -EINVAL;
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@@ -3095,7 +3079,7 @@ mt7531_cpu_port_config(struct dsa_switch
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switch (port) {
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case 5:
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- if (mt7531_is_rgmii_port(priv, port))
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+ if (!priv->p5_sgmii)
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interface = PHY_INTERFACE_MODE_RGMII;
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else
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interface = PHY_INTERFACE_MODE_2500BASEX;
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@@ -3247,7 +3231,7 @@ mt753x_setup(struct dsa_switch *ds)
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mt7530_free_irq_common(priv);
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if (priv->create_sgmii) {
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- ret = priv->create_sgmii(priv, mt7531_dual_sgmii_supported(priv));
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+ ret = priv->create_sgmii(priv);
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if (ret && priv->irq)
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mt7530_free_irq(priv);
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}
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--- a/drivers/net/dsa/mt7530.h
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+++ b/drivers/net/dsa/mt7530.h
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@@ -712,7 +712,6 @@ enum p5_interface_select {
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P5_INTF_SEL_PHY_P0,
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P5_INTF_SEL_PHY_P4,
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P5_INTF_SEL_GMAC5,
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- P5_INTF_SEL_GMAC5_SGMII,
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};
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struct mt7530_priv;
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@@ -781,6 +780,8 @@ struct mt753x_info {
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* registers
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* @p6_interface Holding the current port 6 interface
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* @p5_intf_sel: Holding the current port 5 interface select
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+ * @p5_sgmii: Flag for distinguishing if port 5 of the MT7531 switch
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+ * has got SGMII
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* @irq: IRQ number of the switch
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* @irq_domain: IRQ domain of the switch irq_chip
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* @irq_enable: IRQ enable bits, synced to SYS_INT_EN
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@@ -802,6 +803,7 @@ struct mt7530_priv {
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phy_interface_t p6_interface;
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phy_interface_t p5_interface;
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enum p5_interface_select p5_intf_sel;
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+ bool p5_sgmii;
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u8 mirror_rx;
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u8 mirror_tx;
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struct mt7530_port ports[MT7530_NUM_PORTS];
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@@ -811,7 +813,7 @@ struct mt7530_priv {
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int irq;
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struct irq_domain *irq_domain;
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u32 irq_enable;
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- int (*create_sgmii)(struct mt7530_priv *priv, bool dual_sgmii);
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+ int (*create_sgmii)(struct mt7530_priv *priv);
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u8 active_cpu_ports;
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};
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