243 lines
8.2 KiB
Diff
243 lines
8.2 KiB
Diff
From bc5081617faeb3b2f0c126dc37264b87af7da47f Mon Sep 17 00:00:00 2001
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From: Felipe Balbi <felipe.balbi@linux.intel.com>
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Date: Thu, 4 Feb 2016 14:18:01 +0200
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Subject: usb: dwc3: drop FIFO resizing logic
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That FIFO resizing logic was added to support OMAP5
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ES1.0 which had a bogus default FIFO size. I can't
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remember the exact size of default FIFO, but it was
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less than one bulk superspeed packet (<1024) which
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would prevent USB3 from ever working on OMAP5 ES1.0.
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However, OMAP5 ES1.0 support has been dropped by
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commit aa2f4b16f830 ("ARM: OMAP5: id: Remove ES1.0
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support") which renders FIFO resizing unnecessary.
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Tested-by: Kishon Vijay Abraham I <kishon@ti.com>
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Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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---
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Documentation/devicetree/bindings/usb/dwc3.txt | 4 +-
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.../devicetree/bindings/usb/qcom,dwc3.txt | 1 -
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drivers/usb/dwc3/core.c | 4 -
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drivers/usb/dwc3/core.h | 5 --
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drivers/usb/dwc3/ep0.c | 9 ---
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drivers/usb/dwc3/gadget.c | 86 ----------------------
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drivers/usb/dwc3/platform_data.h | 1 -
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7 files changed, 2 insertions(+), 108 deletions(-)
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--- a/Documentation/devicetree/bindings/usb/dwc3.txt
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+++ b/Documentation/devicetree/bindings/usb/dwc3.txt
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@@ -14,7 +14,6 @@ Optional properties:
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the second element is expected to be a handle to the USB3/SS PHY
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- phys: from the *Generic PHY* bindings
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- phy-names: from the *Generic PHY* bindings
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- - tx-fifo-resize: determines if the FIFO *has* to be reallocated.
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- snps,usb3_lpm_capable: determines if platform is USB3 LPM capable
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- snps,disable_scramble_quirk: true when SW should disable data scrambling.
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Only really useful for FPGA builds.
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@@ -47,6 +46,8 @@ Optional properties:
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register for post-silicon frame length adjustment when the
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fladj_30mhz_sdbnd signal is invalid or incorrect.
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+ - <DEPRECATED> tx-fifo-resize: determines if the FIFO *has* to be reallocated.
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+
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This is usually a subnode to DWC3 glue to which it is connected.
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dwc3@4a030000 {
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@@ -54,5 +55,4 @@ dwc3@4a030000 {
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reg = <0x4a030000 0xcfff>;
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interrupts = <0 92 4>
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usb-phy = <&usb2_phy>, <&usb3,phy>;
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- tx-fifo-resize;
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};
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--- a/Documentation/devicetree/bindings/usb/qcom,dwc3.txt
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+++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.txt
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@@ -59,7 +59,6 @@ Example device nodes:
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interrupts = <0 205 0x4>;
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phys = <&hs_phy>, <&ss_phy>;
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phy-names = "usb2-phy", "usb3-phy";
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- tx-fifo-resize;
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dr_mode = "host";
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};
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};
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--- a/drivers/usb/dwc3/core.c
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+++ b/drivers/usb/dwc3/core.c
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@@ -882,9 +882,6 @@ static int dwc3_probe(struct platform_de
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dwc->usb3_lpm_capable = device_property_read_bool(dev,
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"snps,usb3_lpm_capable");
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- dwc->needs_fifo_resize = device_property_read_bool(dev,
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- "tx-fifo-resize");
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-
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dwc->disable_scramble_quirk = device_property_read_bool(dev,
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"snps,disable_scramble_quirk");
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dwc->u2exit_lfps_quirk = device_property_read_bool(dev,
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@@ -926,7 +923,6 @@ static int dwc3_probe(struct platform_de
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if (pdata->hird_threshold)
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hird_threshold = pdata->hird_threshold;
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- dwc->needs_fifo_resize = pdata->tx_fifo_resize;
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dwc->usb3_lpm_capable = pdata->usb3_lpm_capable;
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dwc->dr_mode = pdata->dr_mode;
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--- a/drivers/usb/dwc3/core.h
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+++ b/drivers/usb/dwc3/core.h
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@@ -705,9 +705,7 @@ struct dwc3_scratchpad_array {
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* 0 - utmi_sleep_n
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* 1 - utmi_l1_suspend_n
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* @is_fpga: true when we are using the FPGA board
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- * @needs_fifo_resize: not all users might want fifo resizing, flag it
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* @pullups_connected: true when Run/Stop bit is set
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- * @resize_fifos: tells us it's ok to reconfigure our TxFIFO sizes.
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* @setup_packet_pending: true when there's a Setup Packet in FIFO. Workaround
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* @start_config_issued: true when StartConfig command has been issued
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* @three_stage_setup: set if we perform a three phase setup
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@@ -850,9 +848,7 @@ struct dwc3 {
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unsigned has_lpm_erratum:1;
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unsigned is_utmi_l1_suspend:1;
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unsigned is_fpga:1;
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- unsigned needs_fifo_resize:1;
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unsigned pullups_connected:1;
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- unsigned resize_fifos:1;
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unsigned setup_packet_pending:1;
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unsigned three_stage_setup:1;
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unsigned usb3_lpm_capable:1;
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@@ -1020,7 +1016,6 @@ struct dwc3_gadget_ep_cmd_params {
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/* prototypes */
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void dwc3_set_mode(struct dwc3 *dwc, u32 mode);
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-int dwc3_gadget_resize_tx_fifos(struct dwc3 *dwc);
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/* check whether we are on the DWC_usb31 core */
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static inline bool dwc3_is_usb31(struct dwc3 *dwc)
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--- a/drivers/usb/dwc3/ep0.c
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+++ b/drivers/usb/dwc3/ep0.c
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@@ -587,9 +587,6 @@ static int dwc3_ep0_set_config(struct dw
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reg = dwc3_readl(dwc->regs, DWC3_DCTL);
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reg |= (DWC3_DCTL_ACCEPTU1ENA | DWC3_DCTL_ACCEPTU2ENA);
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dwc3_writel(dwc->regs, DWC3_DCTL, reg);
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-
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- dwc->resize_fifos = true;
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- dwc3_trace(trace_dwc3_ep0, "resize FIFOs flag SET");
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}
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break;
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@@ -1028,12 +1025,6 @@ static int dwc3_ep0_start_control_status
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static void __dwc3_ep0_do_control_status(struct dwc3 *dwc, struct dwc3_ep *dep)
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{
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- if (dwc->resize_fifos) {
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- dwc3_trace(trace_dwc3_ep0, "Resizing FIFOs");
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- dwc3_gadget_resize_tx_fifos(dwc);
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- dwc->resize_fifos = 0;
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- }
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-
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WARN_ON(dwc3_ep0_start_control_status(dep));
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}
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--- a/drivers/usb/dwc3/gadget.c
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+++ b/drivers/usb/dwc3/gadget.c
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@@ -145,92 +145,6 @@ int dwc3_gadget_set_link_state(struct dw
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return -ETIMEDOUT;
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}
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-/**
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- * dwc3_gadget_resize_tx_fifos - reallocate fifo spaces for current use-case
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- * @dwc: pointer to our context structure
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- *
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- * This function will a best effort FIFO allocation in order
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- * to improve FIFO usage and throughput, while still allowing
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- * us to enable as many endpoints as possible.
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- *
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- * Keep in mind that this operation will be highly dependent
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- * on the configured size for RAM1 - which contains TxFifo -,
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- * the amount of endpoints enabled on coreConsultant tool, and
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- * the width of the Master Bus.
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- *
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- * In the ideal world, we would always be able to satisfy the
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- * following equation:
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- *
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- * ((512 + 2 * MDWIDTH-Bytes) + (Number of IN Endpoints - 1) * \
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- * (3 * (1024 + MDWIDTH-Bytes) + MDWIDTH-Bytes)) / MDWIDTH-Bytes
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- *
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- * Unfortunately, due to many variables that's not always the case.
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- */
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-int dwc3_gadget_resize_tx_fifos(struct dwc3 *dwc)
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-{
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- int last_fifo_depth = 0;
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- int ram1_depth;
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- int fifo_size;
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- int mdwidth;
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- int num;
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-
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- if (!dwc->needs_fifo_resize)
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- return 0;
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-
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- ram1_depth = DWC3_RAM1_DEPTH(dwc->hwparams.hwparams7);
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- mdwidth = DWC3_MDWIDTH(dwc->hwparams.hwparams0);
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-
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- /* MDWIDTH is represented in bits, we need it in bytes */
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- mdwidth >>= 3;
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-
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- /*
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- * FIXME For now we will only allocate 1 wMaxPacketSize space
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- * for each enabled endpoint, later patches will come to
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- * improve this algorithm so that we better use the internal
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- * FIFO space
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- */
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- for (num = 0; num < dwc->num_in_eps; num++) {
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- /* bit0 indicates direction; 1 means IN ep */
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- struct dwc3_ep *dep = dwc->eps[(num << 1) | 1];
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- int mult = 1;
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- int tmp;
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-
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- if (!(dep->flags & DWC3_EP_ENABLED))
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- continue;
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-
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- if (usb_endpoint_xfer_bulk(dep->endpoint.desc)
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- || usb_endpoint_xfer_isoc(dep->endpoint.desc))
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- mult = 3;
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-
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- /*
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- * REVISIT: the following assumes we will always have enough
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- * space available on the FIFO RAM for all possible use cases.
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- * Make sure that's true somehow and change FIFO allocation
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- * accordingly.
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- *
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- * If we have Bulk or Isochronous endpoints, we want
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- * them to be able to be very, very fast. So we're giving
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- * those endpoints a fifo_size which is enough for 3 full
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- * packets
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- */
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- tmp = mult * (dep->endpoint.maxpacket + mdwidth);
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- tmp += mdwidth;
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-
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- fifo_size = DIV_ROUND_UP(tmp, mdwidth);
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-
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- fifo_size |= (last_fifo_depth << 16);
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-
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- dwc3_trace(trace_dwc3_gadget, "%s: Fifo Addr %04x Size %d",
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- dep->name, last_fifo_depth, fifo_size & 0xffff);
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-
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- dwc3_writel(dwc->regs, DWC3_GTXFIFOSIZ(num), fifo_size);
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-
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- last_fifo_depth += (fifo_size & 0xffff);
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- }
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-
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- return 0;
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-}
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-
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void dwc3_gadget_giveback(struct dwc3_ep *dep, struct dwc3_request *req,
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int status)
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{
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--- a/drivers/usb/dwc3/platform_data.h
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+++ b/drivers/usb/dwc3/platform_data.h
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@@ -23,7 +23,6 @@
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struct dwc3_platform_data {
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enum usb_device_speed maximum_speed;
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enum usb_dr_mode dr_mode;
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- bool tx_fifo_resize;
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bool usb3_lpm_capable;
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unsigned is_utmi_l1_suspend:1;
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