135 lines
4.7 KiB
Diff
135 lines
4.7 KiB
Diff
From 62dd8774e71d9af9b0f3cabdeacbb80d24313504 Mon Sep 17 00:00:00 2001
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From: Maxime Ripard <maxime@cerno.tech>
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Date: Thu, 24 Mar 2022 11:57:57 +0100
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Subject: [PATCH] drm/vc4: hdmi: Rework hdmi_enable_4kp60 detection
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In order to support higher HDMI frequencies, users have to set the
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hdmi_enable_4kp60 parameter in their config.txt file.
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We were detecting this so far by calling clk_round_rate on the core
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clock with the frequency we're supposed to run at when one of those
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modes is enabled. Whether or not the parameter was enabled could then be
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inferred by the returned rate since the maximum clock rate reported by
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the firmware was one of the side effect of setting that parameter.
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However, the recent clock rework we did changed what clk_round_rate was
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returning to always return the minimum allowed, and thus this test
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wasn't reliable anymore.
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Let's instead try to set a minimum on that clock for the rate we'd like
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to reach. If the maximum reported by the firmware is below the minimum
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we're trying to set, the clock framework will return an error which we
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then can use to infer whether the parameter is set or not.
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Signed-off-by: Maxime Ripard <maxime@cerno.tech>
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---
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drivers/gpu/drm/vc4/vc4_drv.h | 8 ++++++++
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drivers/gpu/drm/vc4/vc4_hdmi.c | 14 ++++----------
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drivers/gpu/drm/vc4/vc4_hdmi.h | 8 --------
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drivers/gpu/drm/vc4/vc4_hvs.c | 6 ++++++
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4 files changed, 18 insertions(+), 18 deletions(-)
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--- a/drivers/gpu/drm/vc4/vc4_drv.h
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+++ b/drivers/gpu/drm/vc4/vc4_drv.h
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@@ -341,6 +341,14 @@ struct vc4_hvs {
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/* HVS version 5 flag, therefore requires updated dlist structures */
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bool hvs5;
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+
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+ /*
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+ * Even if HDMI0 on the RPi4 can output modes requiring a pixel
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+ * rate higher than 297MHz, it needs some adjustments in the
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+ * config.txt file to be able to do so and thus won't always be
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+ * available.
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+ */
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+ bool vc5_hdmi_enable_scrambling;
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};
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struct vc4_plane {
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--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
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+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
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@@ -292,6 +292,7 @@ static int vc4_hdmi_connector_get_modes(
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{
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struct vc4_hdmi *vc4_hdmi = connector_to_vc4_hdmi(connector);
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struct vc4_hdmi_encoder *vc4_encoder = &vc4_hdmi->encoder;
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+ struct vc4_dev *vc4 = to_vc4_dev(connector->dev);
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int ret = 0;
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struct edid *edid;
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@@ -310,7 +311,7 @@ static int vc4_hdmi_connector_get_modes(
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ret = drm_add_edid_modes(connector, edid);
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kfree(edid);
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- if (vc4_hdmi->disable_4kp60) {
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+ if (!vc4->hvs->vc5_hdmi_enable_scrambling) {
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struct drm_device *drm = connector->dev;
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struct drm_display_mode *mode;
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@@ -1672,11 +1673,12 @@ vc4_hdmi_encoder_clock_valid(const struc
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{
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const struct drm_connector *connector = &vc4_hdmi->connector;
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const struct drm_display_info *info = &connector->display_info;
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+ struct vc4_dev *vc4 = to_vc4_dev(connector->dev);
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if (clock > vc4_hdmi->variant->max_pixel_clock)
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return MODE_CLOCK_HIGH;
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- if (vc4_hdmi->disable_4kp60 && clock > HDMI_14_MAX_TMDS_CLK)
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+ if (!vc4->hvs->vc5_hdmi_enable_scrambling && clock > HDMI_14_MAX_TMDS_CLK)
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return MODE_CLOCK_HIGH;
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if (info->max_tmds_clock && clock > (info->max_tmds_clock * 1000))
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@@ -3156,14 +3158,6 @@ static int vc4_hdmi_bind(struct device *
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vc4_hdmi->disable_wifi_frequencies =
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of_property_read_bool(dev->of_node, "wifi-2.4ghz-coexistence");
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- if (variant->max_pixel_clock == 600000000) {
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- struct vc4_dev *vc4 = to_vc4_dev(drm);
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- long max_rate = clk_round_rate(vc4->hvs->core_clk, 550000000);
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-
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- if (max_rate < 550000000)
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- vc4_hdmi->disable_4kp60 = true;
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- }
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-
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/*
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* If we boot without any cable connected to the HDMI connector,
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* the firmware will skip the HSM initialization and leave it
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--- a/drivers/gpu/drm/vc4/vc4_hdmi.h
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+++ b/drivers/gpu/drm/vc4/vc4_hdmi.h
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@@ -169,14 +169,6 @@ struct vc4_hdmi {
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*/
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bool disable_wifi_frequencies;
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- /*
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- * Even if HDMI0 on the RPi4 can output modes requiring a pixel
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- * rate higher than 297MHz, it needs some adjustments in the
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- * config.txt file to be able to do so and thus won't always be
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- * available.
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- */
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- bool disable_4kp60;
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-
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struct cec_adapter *cec_adap;
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struct cec_msg cec_rx_msg;
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bool cec_tx_ok;
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--- a/drivers/gpu/drm/vc4/vc4_hvs.c
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+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
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@@ -897,12 +897,18 @@ static int vc4_hvs_bind(struct device *d
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hvs->regset.nregs = ARRAY_SIZE(hvs_regs);
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if (hvs->hvs5) {
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+ unsigned long max_rate;
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+
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hvs->core_clk = devm_clk_get(&pdev->dev, NULL);
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if (IS_ERR(hvs->core_clk)) {
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dev_err(&pdev->dev, "Couldn't get core clock\n");
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return PTR_ERR(hvs->core_clk);
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}
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+ max_rate = clk_get_max_rate(hvs->core_clk);
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+ if (max_rate >= 550000000)
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+ hvs->vc5_hdmi_enable_scrambling = true;
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+
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ret = clk_prepare_enable(hvs->core_clk);
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if (ret) {
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dev_err(&pdev->dev, "Couldn't enable the core clock\n");
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