263 lines
8.5 KiB
Diff
263 lines
8.5 KiB
Diff
From 3087dcaf4bfed16ac0e1a124a3196ed3384f5ef3 Mon Sep 17 00:00:00 2001
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From: Phil Elwell <phil@raspberrypi.com>
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Date: Thu, 1 Nov 2018 17:31:37 +0000
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Subject: [PATCH] staging: vchiq_arm: Add 36-bit address support
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Conditional on a new compatible string, change the pagelist encoding
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such that the top 24 bits are the pfn, leaving 8 bits for run length
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(-1), giving a 36-bit address range.
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Manage the split between addresses for the VPU and addresses for the
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40-bit DMA controller with a dedicated DMA device pointer that on non-
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BCM2711 platforms is the same as the main VCHIQ device. This allows
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the VCHIQ node to stay in the usual place in the DT.
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Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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---
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.../interface/vchiq_arm/vchiq_arm.c | 126 ++++++++++++------
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.../interface/vchiq_arm/vchiq_arm.h | 1 +
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2 files changed, 89 insertions(+), 38 deletions(-)
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--- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c
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+++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c
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@@ -79,6 +79,11 @@ static struct vchiq_drvdata bcm2836_drvd
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.cache_line_size = 64,
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};
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+static struct vchiq_drvdata bcm2711_drvdata = {
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+ .cache_line_size = 64,
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+ .use_36bit_addrs = true,
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+};
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+
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struct vchiq_2835_state {
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int inited;
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struct vchiq_arm_state arm_state;
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@@ -108,11 +113,13 @@ static void __iomem *g_regs;
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* of 32.
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*/
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static unsigned int g_cache_line_size = 32;
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+static unsigned int g_use_36bit_addrs = 0;
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static unsigned int g_fragments_size;
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static char *g_fragments_base;
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static char *g_free_fragments;
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static struct semaphore g_free_fragments_sema;
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static struct device *g_dev;
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+static struct device *g_dma_dev;
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static DEFINE_SEMAPHORE(g_free_fragments_mutex);
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@@ -142,7 +149,7 @@ static void
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cleanup_pagelistinfo(struct vchiq_pagelist_info *pagelistinfo)
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{
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if (pagelistinfo->scatterlist_mapped) {
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- dma_unmap_sg(g_dev, pagelistinfo->scatterlist,
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+ dma_unmap_sg(g_dma_dev, pagelistinfo->scatterlist,
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pagelistinfo->num_pages, pagelistinfo->dma_dir);
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}
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@@ -291,7 +298,7 @@ create_pagelist(char *buf, char __user *
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count -= len;
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}
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- dma_buffers = dma_map_sg(g_dev,
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+ dma_buffers = dma_map_sg(g_dma_dev,
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scatterlist,
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num_pages,
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pagelistinfo->dma_dir);
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@@ -305,25 +312,60 @@ create_pagelist(char *buf, char __user *
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/* Combine adjacent blocks for performance */
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k = 0;
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- for_each_sg(scatterlist, sg, dma_buffers, i) {
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- u32 len = sg_dma_len(sg);
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- u32 addr = sg_dma_address(sg);
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-
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- /* Note: addrs is the address + page_count - 1
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- * The firmware expects blocks after the first to be page-
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- * aligned and a multiple of the page size
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- */
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- WARN_ON(len == 0);
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- WARN_ON(i && (i != (dma_buffers - 1)) && (len & ~PAGE_MASK));
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- WARN_ON(i && (addr & ~PAGE_MASK));
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- if (k > 0 &&
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- ((addrs[k - 1] & PAGE_MASK) +
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- (((addrs[k - 1] & ~PAGE_MASK) + 1) << PAGE_SHIFT))
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- == (addr & PAGE_MASK))
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- addrs[k - 1] += ((len + PAGE_SIZE - 1) >> PAGE_SHIFT);
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- else
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- addrs[k++] = (addr & PAGE_MASK) |
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- (((len + PAGE_SIZE - 1) >> PAGE_SHIFT) - 1);
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+ if (g_use_36bit_addrs) {
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+ for_each_sg(scatterlist, sg, dma_buffers, i) {
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+ u32 len = sg_dma_len(sg);
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+ u64 addr = sg_dma_address(sg);
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+ u32 page_id = (u32)((addr >> 4) & ~0xff);
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+ u32 sg_pages = (len + PAGE_SIZE - 1) >> PAGE_SHIFT;
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+
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+ /* Note: addrs is the address + page_count - 1
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+ * The firmware expects blocks after the first to be page-
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+ * aligned and a multiple of the page size
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+ */
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+ WARN_ON(len == 0);
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+ WARN_ON(i &&
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+ (i != (dma_buffers - 1)) && (len & ~PAGE_MASK));
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+ WARN_ON(i && (addr & ~PAGE_MASK));
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+ WARN_ON(upper_32_bits(addr) > 0xf);
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+ if (k > 0 &&
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+ ((addrs[k - 1] & ~0xff) +
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+ (((addrs[k - 1] & 0xff) + 1) << 8)
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+ == page_id)) {
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+ u32 inc_pages = min(sg_pages,
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+ 0xff - (addrs[k - 1] & 0xff));
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+ addrs[k - 1] += inc_pages;
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+ page_id += inc_pages << 8;
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+ sg_pages -= inc_pages;
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+ }
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+ while (sg_pages) {
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+ u32 inc_pages = min(sg_pages, 0x100u);
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+ addrs[k++] = page_id | (inc_pages - 1);
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+ page_id += inc_pages << 8;
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+ sg_pages -= inc_pages;
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+ }
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+ }
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+ } else {
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+ for_each_sg(scatterlist, sg, dma_buffers, i) {
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+ u32 len = sg_dma_len(sg);
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+ u32 addr = sg_dma_address(sg);
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+ u32 new_pages = (len + PAGE_SIZE - 1) >> PAGE_SHIFT;
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+
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+ /* Note: addrs is the address + page_count - 1
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+ * The firmware expects blocks after the first to be page-
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+ * aligned and a multiple of the page size
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+ */
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+ WARN_ON(len == 0);
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+ WARN_ON(i && (i != (dma_buffers - 1)) && (len & ~PAGE_MASK));
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+ WARN_ON(i && (addr & ~PAGE_MASK));
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+ if (k > 0 &&
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+ ((addrs[k - 1] & PAGE_MASK) +
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+ (((addrs[k - 1] & ~PAGE_MASK) + 1) << PAGE_SHIFT))
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+ == (addr & PAGE_MASK))
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+ addrs[k - 1] += new_pages;
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+ else
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+ addrs[k++] = (addr & PAGE_MASK) | (new_pages - 1);
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+ }
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}
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/* Partial cache lines (fragments) require special measures */
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@@ -367,7 +409,7 @@ free_pagelist(struct vchiq_pagelist_info
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* NOTE: dma_unmap_sg must be called before the
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* cpu can touch any of the data/pages.
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*/
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- dma_unmap_sg(g_dev, pagelistinfo->scatterlist,
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+ dma_unmap_sg(g_dma_dev, pagelistinfo->scatterlist,
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pagelistinfo->num_pages, pagelistinfo->dma_dir);
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pagelistinfo->scatterlist_mapped = 0;
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@@ -425,6 +467,7 @@ free_pagelist(struct vchiq_pagelist_info
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int vchiq_platform_init(struct platform_device *pdev, struct vchiq_state *state)
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{
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struct device *dev = &pdev->dev;
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+ struct device *dma_dev = NULL;
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struct vchiq_drvdata *drvdata = platform_get_drvdata(pdev);
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struct rpi_firmware *fw = drvdata->fw;
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struct vchiq_slot_zero *vchiq_slot_zero;
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@@ -446,6 +489,24 @@ int vchiq_platform_init(struct platform_
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g_cache_line_size = drvdata->cache_line_size;
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g_fragments_size = 2 * g_cache_line_size;
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+ if (drvdata->use_36bit_addrs) {
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+ struct device_node *dma_node =
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+ of_find_compatible_node(NULL, NULL, "brcm,bcm2711-dma");
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+
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+ if (dma_node) {
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+ struct platform_device *pdev;
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+
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+ pdev = of_find_device_by_node(dma_node);
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+ if (pdev)
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+ dma_dev = &pdev->dev;
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+ of_node_put(dma_node);
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+ g_use_36bit_addrs = true;
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+ } else {
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+ dev_err(dev, "40-bit DMA controller not found\n");
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+ return -EINVAL;
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+ }
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+ }
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+
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/* Allocate space for the channels in coherent memory */
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slot_mem_size = PAGE_ALIGN(TOTAL_SLOTS * VCHIQ_SLOT_SIZE);
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frag_mem_size = PAGE_ALIGN(g_fragments_size * MAX_FRAGMENTS);
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@@ -458,13 +519,14 @@ int vchiq_platform_init(struct platform_
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}
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WARN_ON(((unsigned long)slot_mem & (PAGE_SIZE - 1)) != 0);
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+ channelbase = slot_phys;
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vchiq_slot_zero = vchiq_init_slots(slot_mem, slot_mem_size);
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if (!vchiq_slot_zero)
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return -EINVAL;
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vchiq_slot_zero->platform_data[VCHIQ_PLATFORM_FRAGMENTS_OFFSET_IDX] =
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- (int)slot_phys + slot_mem_size;
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+ channelbase + slot_mem_size;
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vchiq_slot_zero->platform_data[VCHIQ_PLATFORM_FRAGMENTS_COUNT_IDX] =
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MAX_FRAGMENTS;
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@@ -498,7 +560,6 @@ int vchiq_platform_init(struct platform_
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}
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/* Send the base address of the slots to VideoCore */
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- channelbase = slot_phys;
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err = rpi_firmware_property(fw, RPI_FIRMWARE_VCHIQ_INIT,
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&channelbase, sizeof(channelbase));
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if (err || channelbase) {
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@@ -507,6 +568,8 @@ int vchiq_platform_init(struct platform_
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}
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g_dev = dev;
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+ g_dma_dev = dma_dev ?: dev;
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+
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vchiq_log_info(vchiq_arm_log_level,
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"vchiq_init - done (slots %pK, phys %pad)",
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vchiq_slot_zero, &slot_phys);
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@@ -1768,6 +1831,7 @@ void vchiq_platform_conn_state_changed(s
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static const struct of_device_id vchiq_of_match[] = {
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{ .compatible = "brcm,bcm2835-vchiq", .data = &bcm2835_drvdata },
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{ .compatible = "brcm,bcm2836-vchiq", .data = &bcm2836_drvdata },
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+ { .compatible = "brcm,bcm2711-vchiq", .data = &bcm2711_drvdata },
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{},
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};
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MODULE_DEVICE_TABLE(of, vchiq_of_match);
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@@ -1800,22 +1864,8 @@ vchiq_register_child(struct platform_dev
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child->dev.of_node = np;
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- /*
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- * We want the dma-ranges etc to be copied from a device with the
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- * correct dma-ranges for the VPU.
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- * VCHIQ on Pi4 is now under scb which doesn't get those dma-ranges.
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- * Take the "dma" node as going to be suitable as it sees the world
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- * through the same eyes as the VPU.
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- */
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- np = of_find_node_by_path("dma");
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- if (!np)
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- np = pdev->dev.of_node;
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-
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of_dma_configure(&child->dev, np, true);
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- if (np != pdev->dev.of_node)
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- of_node_put(np);
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-
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return child;
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}
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--- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.h
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+++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.h
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@@ -61,6 +61,7 @@ struct vchiq_arm_state {
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struct vchiq_drvdata {
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const unsigned int cache_line_size;
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+ const bool use_36bit_addrs;
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struct rpi_firmware *fw;
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};
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