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https://git.openwrt.org/openwrt/openwrt.git
synced 2024-06-19 23:28:29 +02:00
Adrian Schmutzler
e4ce3109f2
The node pinctrl0 is already set up in the SOC DTSI files, but defined again as member of pinctrl in most of the device DTS(I) files. This patch removes this redundancy for the entire ramips target. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
154 lines
2.6 KiB
Plaintext
154 lines
2.6 KiB
Plaintext
#include "rt5350.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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/ {
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compatible = "nixcore,x1", "ralink,rt5350-soc";
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chosen {
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bootargs = "console=ttyS1,57600";
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};
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gpio-export {
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compatible = "gpio-export";
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#size-cells = <0>;
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gpio0 {
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gpio-export,name = "gpio0";
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gpio-export,direction_may_change = <1>;
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gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
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};
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gpio1 {
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gpio-export,name = "gpio1";
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gpio-export,direction_may_change = <1>;
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gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
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};
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/* GPIOs 1-6 are I2C,SPI */
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/* GPIO 7-14 are uart1 */
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/* GPIOs 15 & 16 are uart2 */
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/* JTAG */
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gpio17 {
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/* JTAG_TDO */
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gpio-export,name = "gpio17";
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gpio-export,direction_may_change = <1>;
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gpios = <&gpio0 17 GPIO_ACTIVE_HIGH>;
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};
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gpio18 {
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/* JTAG_TDI */
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gpio-export,name = "gpio18";
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gpio-export,direction_may_change = <1>;
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gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>;
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};
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gpio19 {
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/* JTAG_TMS */
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gpio-export,name = "gpio19";
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gpio-export,direction_may_change = <1>;
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gpios = <&gpio0 19 GPIO_ACTIVE_HIGH>;
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};
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gpio20 {
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/* JTAG_TCLK */
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gpio-export,name = "gpio20";
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gpio-export,direction_may_change = <1>;
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gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
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};
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gpio21 {
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/* JTAG_TRST_N */
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gpio-export,name = "gpio21";
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gpio-export,direction_may_change = <1>;
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gpios = <&gpio0 21 GPIO_ACTIVE_HIGH>;
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};
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/* ETH LEDs */
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/*
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gpio22 {
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gpio-export,name = "gpio22";
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gpio-export,direction_may_change = <1>;
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gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
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};
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gpio23 {
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gpio-export,name = "gpio23";
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gpio-export,direction_may_change = <1>;
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gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
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};
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gpio24 {
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gpio-export,name = "gpio24";
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gpio-export,direction_may_change = <1>;
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gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
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};
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gpio25 {
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gpio-export,name = "gpio25";
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gpio-export,direction_may_change = <1>;
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gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
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};
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*/
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gpio26 {
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/* ETH4_LED */
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gpio-export,name = "gpio26";
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gpio-export,direction_may_change = <1>;
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gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
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};
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gpio27 {
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/* spi_cs1 */
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gpio-export,name = "gpio27";
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gpio-export,direction_may_change = <1>;
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gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
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};
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};
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};
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&gpio0 {
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status = "okay";
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};
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&gpio1 {
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status = "okay";
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};
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&i2c {
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status = "okay";
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};
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&uart {
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status = "okay";
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reset-names = "gpio uartf";
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};
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&state_default {
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gpio {
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ralink,group = "jtag", "led", "spi_cs1";
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ralink,function = "gpio";
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};
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};
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ðernet {
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mtd-mac-address = <&factory 0x4>;
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};
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&esw {
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mediatek,portmap = <0x17>;
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};
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&wmac {
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ralink,mtd-eeprom = <&factory 0>;
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};
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&ehci {
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status = "okay";
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};
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&ohci {
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status = "okay";
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};
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