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openwrt/target/linux/ramips/dts/rt3052_planex_mzk-wdpr.dts
Adrian Schmutzler e4ce3109f2 ramips: simplify state_default/pinctrl0 in device DTS files
The node pinctrl0 is already set up in the SOC DTSI files, but
defined again as member of pinctrl in most of the device DTS(I)
files. This patch removes this redundancy for the entire ramips
target.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2019-12-23 02:24:55 +01:00

92 lines
1.4 KiB
Plaintext

/dts-v1/;
#include "rt3050.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
compatible = "planex,mzk-wdpr", "ralink,rt3052-soc";
model = "Planex MZK-WDPR";
chosen {
bootargs = "console=ttyS0,115200";
};
cfi@1f000000 {
compatible = "cfi-flash";
reg = <0x1f000000 0x800000>;
bank-width = <2>;
device-width = <2>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0 0x30000>;
read-only;
};
partition@30000 {
label = "u-boot-env";
reg = <0x30000 0x10000>;
read-only;
};
factory: partition@40000 {
label = "factory";
reg = <0x40000 0x10000>;
read-only;
};
partition@7f0000 {
label = "Data3G";
reg = <0x7f0000 0x10000>;
read-only;
};
partition@50000 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x50000 0x680000>;
};
};
};
gpio-export {
compatible = "gpio-export";
lcd_ctrl1 {
gpio-export,name = "lcd_ctrl1";
gpio-export,output = <0>;
gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>;
};
};
};
&state_default {
gpio {
ralink,group = "spi", "i2c", "jtag", "rgmii", "mdio", "uartf";
ralink,function = "gpio";
};
};
&ethernet {
mtd-mac-address = <&factory 0x28>;
};
&esw {
mediatek,portmap = <0x2f>;
};
&wmac {
ralink,mtd-eeprom = <&factory 0>;
};
&otg {
status = "okay";
};