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Adrian Schmutzler
e4ce3109f2
The node pinctrl0 is already set up in the SOC DTSI files, but defined again as member of pinctrl in most of the device DTS(I) files. This patch removes this redundancy for the entire ramips target. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
156 lines
2.4 KiB
Plaintext
156 lines
2.4 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "mt7621.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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aliases {
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led-boot = &led_power;
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led-failsafe = &led_power;
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led-running = &led_power;
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led-upgrade = &led_power;
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};
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chosen {
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bootargs = "console=ttyS0,57600";
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};
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palmbus: palmbus@1E000000 {
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i2c@900 {
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status = "okay";
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};
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};
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keys {
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compatible = "gpio-keys";
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reset {
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label = "reset";
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gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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wps {
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label = "wps";
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gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_WPS_BUTTON>;
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};
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};
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leds {
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compatible = "gpio-leds";
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led_power: power {
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label = "rt-ac85p:blue:power";
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gpios = <&gpio0 4 GPIO_ACTIVE_LOW>;
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};
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wlan2g {
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label = "rt-ac85p:blue:wlan2g";
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gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "phy0radio";
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};
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wlan5g {
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label = "rt-ac85p:blue:wlan5g";
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gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "phy1radio";
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};
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};
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};
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&sdhci {
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status = "okay";
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};
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&nand {
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status = "okay";
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x0 0xe0000>;
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read-only;
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};
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partition@e0000 {
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label = "u-boot-env";
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reg = <0xe0000 0x100000>;
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read-only;
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};
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factory: partition@1e0000 {
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label = "factory";
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reg = <0x1e0000 0x100000>;
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read-only;
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};
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factory2: partition@2e0000 {
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label = "factory2";
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reg = <0x2e0000 0x100000>;
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read-only;
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};
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partition@3e0000 {
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label = "kernel";
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reg = <0x3e0000 0x400000>;
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};
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partition@7e0000 {
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label = "ubi";
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reg = <0x7e0000 0x2e00000>;
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};
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partition@35e0000 {
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label = "firmware2";
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reg = <0x35e0000 0x3200000>;
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};
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};
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};
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&pcie {
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status = "okay";
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};
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&pcie0 {
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wifi0: wifi@0,0 {
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compatible = "pci14c3,7615";
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reg = <0x0000 0 0 0 0>;
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mediatek,mtd-eeprom = <&factory 0x0000>;
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ieee80211-freq-limit = <2400000 2500000>;
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};
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};
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&pcie1 {
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wifi1: wifi@0,0 {
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compatible = "pci14c3,7615";
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reg = <0x0000 0 0 0 0>;
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mediatek,mtd-eeprom = <&factory 0x8000>;
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ieee80211-freq-limit = <5000000 6000000>;
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};
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};
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ðernet {
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mtd-mac-address = <&factory 0xe000>;
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mediatek,portmap = "wllll";
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port@5 {
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status = "disabled";
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};
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};
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&i2c {
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status = "disabled";
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};
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&state_default {
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gpio {
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ralink,group = "uart2", "uart3", "i2c";
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ralink,function = "gpio";
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};
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};
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