53 lines
1.9 KiB
Diff
53 lines
1.9 KiB
Diff
From 9d32637122de88f1ef614c29703f0e050cad342e Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Bj=C3=B8rn=20Mork?= <bjorn@mork.no>
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Date: Wed, 1 Feb 2023 19:23:30 +0100
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Subject: [PATCH 12/13] net: mediatek: sgmii: fix duplex configuration
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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The logic of the duplex bit is inverted. Setting it means half
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duplex, not full duplex.
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Fix and rename macro to avoid confusion.
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Fixes: 7e538372694b ("net: ethernet: mediatek: Re-add support SGMII")
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Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Signed-off-by: Bjørn Mork <bjorn@mork.no>
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Acked-by: Daniel Golle <daniel@makrotopia.org>
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Tested-by: Daniel Golle <daniel@makrotopia.org>
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Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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---
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drivers/net/ethernet/mediatek/mtk_eth_soc.h | 2 +-
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drivers/net/ethernet/mediatek/mtk_sgmii.c | 6 +++---
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2 files changed, 4 insertions(+), 4 deletions(-)
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--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
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+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
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@@ -534,7 +534,7 @@
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#define SGMII_SPEED_10 FIELD_PREP(SGMII_SPEED_MASK, 0)
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#define SGMII_SPEED_100 FIELD_PREP(SGMII_SPEED_MASK, 1)
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#define SGMII_SPEED_1000 FIELD_PREP(SGMII_SPEED_MASK, 2)
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-#define SGMII_DUPLEX_FULL BIT(4)
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+#define SGMII_DUPLEX_HALF BIT(4)
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#define SGMII_IF_MODE_BIT5 BIT(5)
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#define SGMII_REMOTE_FAULT_DIS BIT(8)
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#define SGMII_CODE_SYNC_SET_VAL BIT(9)
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--- a/drivers/net/ethernet/mediatek/mtk_sgmii.c
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+++ b/drivers/net/ethernet/mediatek/mtk_sgmii.c
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@@ -154,11 +154,11 @@ static void mtk_pcs_link_up(struct phyli
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else
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sgm_mode = SGMII_SPEED_1000;
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- if (duplex == DUPLEX_FULL)
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- sgm_mode |= SGMII_DUPLEX_FULL;
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+ if (duplex != DUPLEX_FULL)
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+ sgm_mode |= SGMII_DUPLEX_HALF;
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regmap_update_bits(mpcs->regmap, SGMSYS_SGMII_MODE,
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- SGMII_DUPLEX_FULL | SGMII_SPEED_MASK,
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+ SGMII_DUPLEX_HALF | SGMII_SPEED_MASK,
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sgm_mode);
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}
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}
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