80 lines
3.0 KiB
Diff
80 lines
3.0 KiB
Diff
From 4b11e3eb0eb7245a0d22a5dc4161c54eea42910c Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com>
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Date: Sat, 17 Jun 2023 09:26:44 +0300
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Subject: [PATCH 16/48] net: dsa: mt7530: set all CPU ports in MT7531_CPU_PMAP
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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MT7531_CPU_PMAP represents the destination port mask for trapped-to-CPU
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frames (further restricted by PCR_MATRIX).
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Currently the driver sets the first CPU port as the single port in this bit
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mask, which works fine regardless of whether the device tree defines port
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5, 6 or 5+6 as CPU ports. This is because the logic coincides with DSA's
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logic of picking the first CPU port as the CPU port that all user ports are
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affine to, by default.
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An upcoming change would like to influence DSA's selection of the default
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CPU port to no longer be the first one, and in that case, this logic needs
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adaptation.
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Since there is no observed leakage or duplication of frames if all CPU
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ports are defined in this bit mask, simply include them all.
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Suggested-by: Russell King (Oracle) <linux@armlinux.org.uk>
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Suggested-by: Vladimir Oltean <olteanv@gmail.com>
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Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
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Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
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Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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---
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drivers/net/dsa/mt7530.c | 15 +++++++--------
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drivers/net/dsa/mt7530.h | 1 +
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2 files changed, 8 insertions(+), 8 deletions(-)
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--- a/drivers/net/dsa/mt7530.c
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+++ b/drivers/net/dsa/mt7530.c
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@@ -1069,6 +1069,13 @@ mt753x_cpu_port_enable(struct dsa_switch
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if (priv->id == ID_MT7530 || priv->id == ID_MT7621)
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mt7530_rmw(priv, MT7530_MFC, CPU_MASK, CPU_EN | CPU_PORT(port));
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+ /* Add the CPU port to the CPU port bitmap for MT7531 and the switch on
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+ * the MT7988 SoC. Trapped frames will be forwarded to the CPU port that
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+ * is affine to the inbound user port.
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+ */
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+ if (priv->id == ID_MT7531 || priv->id == ID_MT7988)
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+ mt7530_set(priv, MT7531_CFC, MT7531_CPU_PMAP(BIT(port)));
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+
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/* CPU port gets connected to all user ports of
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* the switch.
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*/
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@@ -2411,16 +2418,8 @@ static int
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mt7531_setup_common(struct dsa_switch *ds)
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{
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struct mt7530_priv *priv = ds->priv;
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- struct dsa_port *cpu_dp;
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int ret, i;
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- /* BPDU to CPU port */
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- dsa_switch_for_each_cpu_port(cpu_dp, ds) {
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- mt7530_rmw(priv, MT7531_CFC, MT7531_CPU_PMAP_MASK,
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- BIT(cpu_dp->index));
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- break;
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- }
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-
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mt753x_trap_frames(priv);
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/* Enable and reset MIB counters */
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--- a/drivers/net/dsa/mt7530.h
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+++ b/drivers/net/dsa/mt7530.h
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@@ -54,6 +54,7 @@ enum mt753x_id {
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#define MT7531_MIRROR_PORT_GET(x) (((x) >> 16) & MIRROR_MASK)
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#define MT7531_MIRROR_PORT_SET(x) (((x) & MIRROR_MASK) << 16)
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#define MT7531_CPU_PMAP_MASK GENMASK(7, 0)
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+#define MT7531_CPU_PMAP(x) FIELD_PREP(MT7531_CPU_PMAP_MASK, x)
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#define MT753X_MIRROR_REG(id) ((((id) == ID_MT7531) || ((id) == ID_MT7988)) ? \
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MT7531_CFC : MT7530_MFC)
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