142 lines
3.5 KiB
Diff
142 lines
3.5 KiB
Diff
From f39f2312a68ec0843adba08f9c9182ffa5624190 Mon Sep 17 00:00:00 2001
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From: Claudiu Beznea <claudiu.beznea@microchip.com>
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Date: Wed, 16 Dec 2020 14:57:33 +0200
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Subject: [PATCH 145/247] power: reset: at91-sama5d2_shdwc: add support for
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sama7g5
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Add support for SAMA7G5 by adding proper struct reg_config structure
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and since SAMA7G5 is not currently on LPDDR setups the commit also
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avoid the mapping of DDR controller.
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Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
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Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
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---
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drivers/power/reset/at91-sama5d2_shdwc.c | 72 ++++++++++++++++++------
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1 file changed, 54 insertions(+), 18 deletions(-)
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--- a/drivers/power/reset/at91-sama5d2_shdwc.c
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+++ b/drivers/power/reset/at91-sama5d2_shdwc.c
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@@ -78,9 +78,15 @@ struct pmc_reg_config {
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u8 mckr;
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};
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+struct ddrc_reg_config {
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+ u32 type_offset;
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+ u32 type_mask;
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+};
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+
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struct reg_config {
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struct shdwc_reg_config shdwc;
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struct pmc_reg_config pmc;
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+ struct ddrc_reg_config ddrc;
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};
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struct shdwc {
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@@ -262,6 +268,10 @@ static const struct reg_config sama5d2_r
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.pmc = {
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.mckr = 0x30,
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},
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+ .ddrc = {
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+ .type_offset = AT91_DDRSDRC_MDR,
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+ .type_mask = AT91_DDRSDRC_MD
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+ },
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};
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static const struct reg_config sam9x60_reg_config = {
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@@ -275,6 +285,23 @@ static const struct reg_config sam9x60_r
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.pmc = {
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.mckr = 0x28,
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},
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+ .ddrc = {
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+ .type_offset = AT91_DDRSDRC_MDR,
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+ .type_mask = AT91_DDRSDRC_MD
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+ },
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+};
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+
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+static const struct reg_config sama7g5_reg_config = {
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+ .shdwc = {
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+ .wkup_pin_input = 0,
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+ .mr_rtcwk_shift = 17,
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+ .mr_rttwk_shift = 16,
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+ .sr_rtcwk_shift = 5,
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+ .sr_rttwk_shift = 4,
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+ },
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+ .pmc = {
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+ .mckr = 0x28,
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+ },
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};
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static const struct of_device_id at91_shdwc_of_match[] = {
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@@ -285,6 +312,10 @@ static const struct of_device_id at91_sh
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{
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.compatible = "microchip,sam9x60-shdwc",
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.data = &sam9x60_reg_config,
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+ },
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+ {
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+ .compatible = "microchip,sama7g5-shdwc",
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+ .data = &sama7g5_reg_config,
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}, {
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/*sentinel*/
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}
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@@ -294,6 +325,7 @@ MODULE_DEVICE_TABLE(of, at91_shdwc_of_ma
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static const struct of_device_id at91_pmc_ids[] = {
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{ .compatible = "atmel,sama5d2-pmc" },
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{ .compatible = "microchip,sam9x60-pmc" },
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+ { .compatible = "microchip,sama7g5-pmc" },
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{ /* Sentinel. */ }
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};
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@@ -355,30 +387,34 @@ static int __init at91_shdwc_probe(struc
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goto clk_disable;
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}
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- np = of_find_compatible_node(NULL, NULL, "atmel,sama5d3-ddramc");
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- if (!np) {
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- ret = -ENODEV;
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- goto unmap;
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- }
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+ if (at91_shdwc->rcfg->ddrc.type_mask) {
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+ np = of_find_compatible_node(NULL, NULL,
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+ "atmel,sama5d3-ddramc");
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+ if (!np) {
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+ ret = -ENODEV;
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+ goto unmap;
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+ }
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- at91_shdwc->mpddrc_base = of_iomap(np, 0);
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- of_node_put(np);
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+ at91_shdwc->mpddrc_base = of_iomap(np, 0);
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+ of_node_put(np);
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- if (!at91_shdwc->mpddrc_base) {
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- ret = -ENOMEM;
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- goto unmap;
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+ if (!at91_shdwc->mpddrc_base) {
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+ ret = -ENOMEM;
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+ goto unmap;
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+ }
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+
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+ ddr_type = readl(at91_shdwc->mpddrc_base +
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+ at91_shdwc->rcfg->ddrc.type_offset) &
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+ at91_shdwc->rcfg->ddrc.type_mask;
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+ if (ddr_type != AT91_DDRSDRC_MD_LPDDR2 &&
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+ ddr_type != AT91_DDRSDRC_MD_LPDDR3) {
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+ iounmap(at91_shdwc->mpddrc_base);
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+ at91_shdwc->mpddrc_base = NULL;
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+ }
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}
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pm_power_off = at91_poweroff;
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- ddr_type = readl(at91_shdwc->mpddrc_base + AT91_DDRSDRC_MDR) &
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- AT91_DDRSDRC_MD;
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- if (ddr_type != AT91_DDRSDRC_MD_LPDDR2 &&
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- ddr_type != AT91_DDRSDRC_MD_LPDDR3) {
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- iounmap(at91_shdwc->mpddrc_base);
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- at91_shdwc->mpddrc_base = NULL;
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- }
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-
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return 0;
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unmap:
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