61 lines
2.4 KiB
Diff
61 lines
2.4 KiB
Diff
From 2b8db0ad29be4c12f2a1c5a209e15e5e14efc047 Mon Sep 17 00:00:00 2001
|
|
From: Dom Cobley <popcornmix@gmail.com>
|
|
Date: Thu, 27 Jan 2022 15:32:04 +0000
|
|
Subject: [PATCH] vc4/drm:plane: Make use of chroma siting parameter
|
|
|
|
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
|
|
---
|
|
drivers/gpu/drm/vc4/vc4_plane.c | 13 +++++++++----
|
|
1 file changed, 9 insertions(+), 4 deletions(-)
|
|
|
|
--- a/drivers/gpu/drm/vc4/vc4_plane.c
|
|
+++ b/drivers/gpu/drm/vc4/vc4_plane.c
|
|
@@ -467,17 +467,18 @@ static void vc4_write_tpz(struct vc4_pla
|
|
/* phase magnitude bits */
|
|
#define PHASE_BITS 6
|
|
|
|
-static void vc4_write_ppf(struct vc4_plane_state *vc4_state, u32 src, u32 dst, u32 xy, int channel)
|
|
+static void vc4_write_ppf(struct vc4_plane_state *vc4_state, u32 src, u32 dst, u32 xy, int channel, int chroma_offset)
|
|
{
|
|
u32 scale = src / dst;
|
|
s32 offset, offset2;
|
|
s32 phase;
|
|
|
|
/* Start the phase at 1/2 pixel from the 1st pixel at src_x.
|
|
- 1/4 pixel for YUV. */
|
|
+ 1/4 pixel for YUV, plus the offset for chroma siting */
|
|
if (channel) {
|
|
/* the phase is relative to scale_src->x, so shift it for display list's x value */
|
|
offset = (xy & 0x1ffff) >> (16 - PHASE_BITS) >> 1;
|
|
+ offset -= chroma_offset >> (17 - PHASE_BITS);
|
|
offset += -(1 << PHASE_BITS >> 2);
|
|
} else {
|
|
/* the phase is relative to scale_src->x, so shift it for display list's x value */
|
|
@@ -563,13 +564,15 @@ static void vc4_write_scaling_parameters
|
|
/* Ch0 H-PPF Word 0: Scaling Parameters */
|
|
if (vc4_state->x_scaling[channel] == VC4_SCALING_PPF) {
|
|
vc4_write_ppf(vc4_state,
|
|
- vc4_state->src_w[channel], vc4_state->crtc_w, vc4_state->src_x, channel);
|
|
+ vc4_state->src_w[channel], vc4_state->crtc_w, vc4_state->src_x, channel,
|
|
+ state->chroma_siting_h);
|
|
}
|
|
|
|
/* Ch0 V-PPF Words 0-1: Scaling Parameters, Context */
|
|
if (vc4_state->y_scaling[channel] == VC4_SCALING_PPF) {
|
|
vc4_write_ppf(vc4_state,
|
|
- vc4_state->src_h[channel], vc4_state->crtc_h, vc4_state->src_y, channel);
|
|
+ vc4_state->src_h[channel], vc4_state->crtc_h, vc4_state->src_y, channel,
|
|
+ state->chroma_siting_v);
|
|
vc4_dlist_write(vc4_state, 0xc0c0c0c0);
|
|
}
|
|
|
|
@@ -1646,6 +1649,8 @@ struct drm_plane *vc4_plane_init(struct
|
|
DRM_COLOR_YCBCR_BT709,
|
|
DRM_COLOR_YCBCR_LIMITED_RANGE);
|
|
|
|
+ drm_plane_create_chroma_siting_properties(plane, 0, 0);
|
|
+
|
|
if (type == DRM_PLANE_TYPE_PRIMARY)
|
|
drm_plane_create_zpos_immutable_property(plane, 0);
|
|
|