mirror of
https://git.openwrt.org/openwrt/openwrt.git
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1d94f72439
Rebased patches:
* generic: 273-batman-adv-Convert-packet.h-to-uapi-header.patch
* ipq806x: 0065-arm-override-compiler-flags.patch
* mvebu: 513-arm64-dts-marvell-armada37xx-Add-emmc-sdio-pinctrl-d.patch
Removed patches:
Fixed upstream:
* ar71xx: 821-serial-core-add-support-for-boot-console-with-arbitr.patch
* ath79: 921-serial-core-add-support-for-boot-console-with-arbitr.patch
- in 4.14.256 via 9112e7ef87149b3d8093e7446d784117f6e18d69
* mvebu: 527-PCI-aardvark-allow-to-specify-link-capability.patch
- in 4.14.257 via 62a3dc9b65a2b24800fc4267b8cf590fad135034
* mvebu: 524-PCI-aardvark-set-host-and-device-to-the-same-MAX-payload-size.patch
- should be hopefully fixed by the bunch of changes in .256 and .257
Run tested on ipq40xx/glinet-b1300 and mvebu/turris-omnia.
Fixes: CVE-2021-3640
Signed-off-by: Petr Štetiar <ynezz@true.cz>
85 lines
3.4 KiB
Diff
85 lines
3.4 KiB
Diff
From d0322bf7bebe87012b4f95c85be6b5ba0cb6f344 Mon Sep 17 00:00:00 2001
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From: Jonas Gorski <jonas.gorski@gmail.com>
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Date: Sun, 16 Jul 2017 12:31:44 +0200
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Subject: [PATCH V2 2/8] MIPS: BCM63XX: provide periph clock as refclk for uart
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Add a lookup as "refclk" to describe its function for the uarts.
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Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
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Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
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---
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arch/mips/bcm63xx/clk.c | 13 +++++++++++++
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1 file changed, 13 insertions(+)
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--- a/arch/mips/bcm63xx/clk.c
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+++ b/arch/mips/bcm63xx/clk.c
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@@ -369,6 +369,8 @@ EXPORT_SYMBOL_GPL(clk_round_rate);
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static struct clk_lookup bcm3368_clks[] = {
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/* fixed rate clocks */
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CLKDEV_INIT(NULL, "periph", &clk_periph),
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+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
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+ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
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/* gated clocks */
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CLKDEV_INIT(NULL, "enet0", &clk_enet0),
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CLKDEV_INIT(NULL, "enet1", &clk_enet1),
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@@ -382,6 +384,8 @@ static struct clk_lookup bcm3368_clks[]
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static struct clk_lookup bcm6328_clks[] = {
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/* fixed rate clocks */
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CLKDEV_INIT(NULL, "periph", &clk_periph),
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+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
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+ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
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/* gated clocks */
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CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
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CLKDEV_INIT(NULL, "usbh", &clk_usbh),
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@@ -393,6 +397,7 @@ static struct clk_lookup bcm6328_clks[]
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static struct clk_lookup bcm6338_clks[] = {
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/* fixed rate clocks */
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CLKDEV_INIT(NULL, "periph", &clk_periph),
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+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
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/* gated clocks */
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CLKDEV_INIT(NULL, "enet0", &clk_enet0),
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CLKDEV_INIT(NULL, "enet1", &clk_enet1),
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@@ -405,6 +410,7 @@ static struct clk_lookup bcm6338_clks[]
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static struct clk_lookup bcm6345_clks[] = {
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/* fixed rate clocks */
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CLKDEV_INIT(NULL, "periph", &clk_periph),
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+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
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/* gated clocks */
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CLKDEV_INIT(NULL, "enet0", &clk_enet0),
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CLKDEV_INIT(NULL, "enet1", &clk_enet1),
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@@ -417,6 +423,7 @@ static struct clk_lookup bcm6345_clks[]
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static struct clk_lookup bcm6348_clks[] = {
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/* fixed rate clocks */
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CLKDEV_INIT(NULL, "periph", &clk_periph),
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+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
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/* gated clocks */
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CLKDEV_INIT(NULL, "enet0", &clk_enet0),
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CLKDEV_INIT(NULL, "enet1", &clk_enet1),
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@@ -429,6 +436,8 @@ static struct clk_lookup bcm6348_clks[]
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static struct clk_lookup bcm6358_clks[] = {
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/* fixed rate clocks */
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CLKDEV_INIT(NULL, "periph", &clk_periph),
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+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
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+ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
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/* gated clocks */
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CLKDEV_INIT(NULL, "enet0", &clk_enet0),
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CLKDEV_INIT(NULL, "enet1", &clk_enet1),
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@@ -442,6 +451,8 @@ static struct clk_lookup bcm6358_clks[]
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static struct clk_lookup bcm6362_clks[] = {
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/* fixed rate clocks */
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CLKDEV_INIT(NULL, "periph", &clk_periph),
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+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
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+ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
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/* gated clocks */
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CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
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CLKDEV_INIT(NULL, "usbh", &clk_usbh),
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@@ -455,6 +466,8 @@ static struct clk_lookup bcm6362_clks[]
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static struct clk_lookup bcm6368_clks[] = {
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/* fixed rate clocks */
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CLKDEV_INIT(NULL, "periph", &clk_periph),
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+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
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+ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
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/* gated clocks */
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CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
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CLKDEV_INIT(NULL, "usbh", &clk_usbh),
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