96 lines
3.0 KiB
Diff
96 lines
3.0 KiB
Diff
From e5bf75ca33946d81c82014168042a64db7c81551 Mon Sep 17 00:00:00 2001
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From: Pan Jiafei <Jiafei.Pan@nxp.com>
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Date: Thu, 17 Mar 2016 02:01:03 +0000
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Subject: [PATCH] arm: add new non-shareable ioremap
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Signed-off-by: Pan Jiafei <Jiafei.Pan@nxp.com>
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Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
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---
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arch/arm/include/asm/io.h | 3 +++
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arch/arm/include/asm/mach/map.h | 4 ++--
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arch/arm/mm/ioremap.c | 7 +++++++
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arch/arm/mm/mmu.c | 9 +++++++++
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4 files changed, 21 insertions(+), 2 deletions(-)
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--- a/arch/arm/include/asm/io.h
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+++ b/arch/arm/include/asm/io.h
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@@ -123,6 +123,7 @@ static inline u32 __raw_readl(const vola
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#define MT_DEVICE_NONSHARED 1
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#define MT_DEVICE_CACHED 2
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#define MT_DEVICE_WC 3
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+#define MT_MEMORY_RW_NS 4
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/*
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* types 4 onwards can be found in asm/mach/map.h and are undefined
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* for ioremap
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@@ -438,6 +439,8 @@ void __iomem *ioremap_wc(resource_size_t
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#define ioremap_wc ioremap_wc
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#define ioremap_wt ioremap_wc
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+void __iomem *ioremap_cache_ns(resource_size_t res_cookie, size_t size);
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+
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void iounmap(volatile void __iomem *iomem_cookie);
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#define iounmap iounmap
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--- a/arch/arm/include/asm/mach/map.h
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+++ b/arch/arm/include/asm/mach/map.h
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@@ -18,9 +18,9 @@ struct map_desc {
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unsigned int type;
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};
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-/* types 0-3 are defined in asm/io.h */
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+/* types 0-4 are defined in asm/io.h */
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enum {
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- MT_UNCACHED = 4,
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+ MT_UNCACHED = 5,
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MT_CACHECLEAN,
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MT_MINICLEAN,
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MT_LOW_VECTORS,
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--- a/arch/arm/mm/ioremap.c
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+++ b/arch/arm/mm/ioremap.c
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@@ -401,6 +401,13 @@ void __iomem *ioremap_wc(resource_size_t
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}
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EXPORT_SYMBOL(ioremap_wc);
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+void __iomem *ioremap_cache_ns(resource_size_t res_cookie, size_t size)
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+{
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+ return arch_ioremap_caller(res_cookie, size, MT_MEMORY_RW_NS,
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+ __builtin_return_address(0));
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+}
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+EXPORT_SYMBOL(ioremap_cache_ns);
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+
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/*
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* Remap an arbitrary physical address space into the kernel virtual
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* address space as memory. Needed when the kernel wants to execute
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--- a/arch/arm/mm/mmu.c
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+++ b/arch/arm/mm/mmu.c
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@@ -327,6 +327,13 @@ static struct mem_type mem_types[] __ro_
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#endif
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.domain = DOMAIN_KERNEL,
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},
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+ [MT_MEMORY_RW_NS] = {
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+ .prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY |
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+ L_PTE_XN,
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+ .prot_l1 = PMD_TYPE_TABLE,
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+ .prot_sect = PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_SECT_XN,
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+ .domain = DOMAIN_KERNEL,
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+ },
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[MT_ROM] = {
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.prot_sect = PMD_TYPE_SECT,
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.domain = DOMAIN_KERNEL,
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@@ -667,6 +674,7 @@ static void __init build_mem_type_table(
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}
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kern_pgprot |= PTE_EXT_AF;
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vecs_pgprot |= PTE_EXT_AF;
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+ mem_types[MT_MEMORY_RW_NS].prot_pte |= PTE_EXT_AF | cp->pte;
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/*
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* Set PXN for user mappings
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@@ -695,6 +703,7 @@ static void __init build_mem_type_table(
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mem_types[MT_MEMORY_RWX].prot_pte |= kern_pgprot;
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mem_types[MT_MEMORY_RW].prot_sect |= ecc_mask | cp->pmd;
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mem_types[MT_MEMORY_RW].prot_pte |= kern_pgprot;
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+ mem_types[MT_MEMORY_RW_NS].prot_sect |= ecc_mask | cp->pmd;
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mem_types[MT_MEMORY_RO].prot_sect |= ecc_mask | cp->pmd;
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mem_types[MT_MEMORY_RO].prot_pte |= kern_pgprot;
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mem_types[MT_MEMORY_DMA_READY].prot_pte |= kern_pgprot;
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