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52 lines
2.1 KiB
Diff
52 lines
2.1 KiB
Diff
From 602f85ff15d45bd313f8f6600d72202a50fd83a9 Mon Sep 17 00:00:00 2001
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From: Claudiu Beznea <claudiu.beznea@microchip.com>
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Date: Mon, 19 Jul 2021 11:03:17 +0300
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Subject: [PATCH 194/247] clk: at91: add register definition for sama7g5's
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master clock
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Add register definitions for SAMA7G5's master clock. These would be
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also used by architecture specific power saving code.
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Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
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Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
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Link: https://lore.kernel.org/r/20210719080317.1045832-3-claudiu.beznea@microchip.com
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---
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include/linux/clk/at91_pmc.h | 26 ++++++++++++++++++++++++++
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1 file changed, 26 insertions(+)
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--- a/include/linux/clk/at91_pmc.h
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+++ b/include/linux/clk/at91_pmc.h
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@@ -137,6 +137,32 @@
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#define AT91_PMC_PLLADIV2_ON (1 << 12)
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#define AT91_PMC_H32MXDIV BIT(24)
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+#define AT91_PMC_MCR_V2 0x30 /* Master Clock Register [SAMA7G5 only] */
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+#define AT91_PMC_MCR_V2_ID_MSK (0xF)
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+#define AT91_PMC_MCR_V2_ID(_id) ((_id) & AT91_PMC_MCR_V2_ID_MSK)
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+#define AT91_PMC_MCR_V2_CMD (1 << 7)
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+#define AT91_PMC_MCR_V2_DIV (7 << 8)
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+#define AT91_PMC_MCR_V2_DIV1 (0 << 8)
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+#define AT91_PMC_MCR_V2_DIV2 (1 << 8)
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+#define AT91_PMC_MCR_V2_DIV4 (2 << 8)
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+#define AT91_PMC_MCR_V2_DIV8 (3 << 8)
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+#define AT91_PMC_MCR_V2_DIV16 (4 << 8)
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+#define AT91_PMC_MCR_V2_DIV32 (5 << 8)
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+#define AT91_PMC_MCR_V2_DIV64 (6 << 8)
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+#define AT91_PMC_MCR_V2_DIV3 (7 << 8)
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+#define AT91_PMC_MCR_V2_CSS (0x1F << 16)
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+#define AT91_PMC_MCR_V2_CSS_MD_SLCK (0 << 16)
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+#define AT91_PMC_MCR_V2_CSS_TD_SLCK (1 << 16)
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+#define AT91_PMC_MCR_V2_CSS_MAINCK (2 << 16)
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+#define AT91_PMC_MCR_V2_CSS_MCK0 (3 << 16)
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+#define AT91_PMC_MCR_V2_CSS_SYSPLL (5 << 16)
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+#define AT91_PMC_MCR_V2_CSS_DDRPLL (6 << 16)
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+#define AT91_PMC_MCR_V2_CSS_IMGPLL (7 << 16)
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+#define AT91_PMC_MCR_V2_CSS_BAUDPLL (8 << 16)
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+#define AT91_PMC_MCR_V2_CSS_AUDIOPLL (9 << 16)
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+#define AT91_PMC_MCR_V2_CSS_ETHPLL (10 << 16)
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+#define AT91_PMC_MCR_V2_EN (1 << 28)
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+
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#define AT91_PMC_XTALF 0x34 /* Main XTAL Frequency Register [SAMA7G5 only] */
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#define AT91_PMC_USB 0x38 /* USB Clock Register [some SAM9 only] */
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