146 lines
5.3 KiB
Diff
146 lines
5.3 KiB
Diff
From fa9e6cd8f3ba4a277c06e4c1fb01cd69b3a57234 Mon Sep 17 00:00:00 2001
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From: Eugen Hristev <eugen.hristev@microchip.com>
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Date: Tue, 13 Apr 2021 12:57:25 +0200
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Subject: [PATCH 183/247] media: atmel: atmel-isc-base: add support for more
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formats and additional pipeline modules
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Add support for additional formats supported by newer pipelines, and for
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additional pipeline modules.
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Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
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Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
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Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
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---
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drivers/media/platform/atmel/atmel-isc-base.c | 48 +++++++++++++++----
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1 file changed, 38 insertions(+), 10 deletions(-)
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--- a/drivers/media/platform/atmel/atmel-isc-base.c
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+++ b/drivers/media/platform/atmel/atmel-isc-base.c
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@@ -855,6 +855,8 @@ static int isc_try_validate_formats(stru
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case V4L2_PIX_FMT_YUV420:
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case V4L2_PIX_FMT_YUV422P:
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case V4L2_PIX_FMT_YUYV:
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+ case V4L2_PIX_FMT_UYVY:
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+ case V4L2_PIX_FMT_VYUY:
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ret = 0;
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yuv = true;
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break;
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@@ -869,6 +871,7 @@ static int isc_try_validate_formats(stru
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break;
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case V4L2_PIX_FMT_GREY:
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case V4L2_PIX_FMT_Y10:
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+ case V4L2_PIX_FMT_Y16:
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ret = 0;
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grey = true;
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break;
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@@ -899,6 +902,8 @@ static int isc_try_validate_formats(stru
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*/
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static int isc_try_configure_rlp_dma(struct isc_device *isc, bool direct_dump)
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{
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+ isc->try_config.rlp_cfg_mode = 0;
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+
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switch (isc->try_config.fourcc) {
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case V4L2_PIX_FMT_SBGGR8:
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case V4L2_PIX_FMT_SGBRG8:
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@@ -965,7 +970,19 @@ static int isc_try_configure_rlp_dma(str
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isc->try_config.bpp = 16;
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break;
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case V4L2_PIX_FMT_YUYV:
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- isc->try_config.rlp_cfg_mode = ISC_RLP_CFG_MODE_YYCC;
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+ isc->try_config.rlp_cfg_mode = ISC_RLP_CFG_MODE_YCYC | ISC_RLP_CFG_YMODE_YUYV;
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+ isc->try_config.dcfg_imode = ISC_DCFG_IMODE_PACKED32;
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+ isc->try_config.dctrl_dview = ISC_DCTRL_DVIEW_PACKED;
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+ isc->try_config.bpp = 16;
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+ break;
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+ case V4L2_PIX_FMT_UYVY:
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+ isc->try_config.rlp_cfg_mode = ISC_RLP_CFG_MODE_YCYC | ISC_RLP_CFG_YMODE_UYVY;
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+ isc->try_config.dcfg_imode = ISC_DCFG_IMODE_PACKED32;
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+ isc->try_config.dctrl_dview = ISC_DCTRL_DVIEW_PACKED;
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+ isc->try_config.bpp = 16;
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+ break;
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+ case V4L2_PIX_FMT_VYUY:
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+ isc->try_config.rlp_cfg_mode = ISC_RLP_CFG_MODE_YCYC | ISC_RLP_CFG_YMODE_VYUY;
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isc->try_config.dcfg_imode = ISC_DCFG_IMODE_PACKED32;
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isc->try_config.dctrl_dview = ISC_DCTRL_DVIEW_PACKED;
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isc->try_config.bpp = 16;
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@@ -976,8 +993,11 @@ static int isc_try_configure_rlp_dma(str
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isc->try_config.dctrl_dview = ISC_DCTRL_DVIEW_PACKED;
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isc->try_config.bpp = 8;
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break;
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+ case V4L2_PIX_FMT_Y16:
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+ isc->try_config.rlp_cfg_mode = ISC_RLP_CFG_MODE_DATY10 | ISC_RLP_CFG_LSH;
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+ fallthrough;
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case V4L2_PIX_FMT_Y10:
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- isc->try_config.rlp_cfg_mode = ISC_RLP_CFG_MODE_DATY10;
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+ isc->try_config.rlp_cfg_mode |= ISC_RLP_CFG_MODE_DATY10;
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isc->try_config.dcfg_imode = ISC_DCFG_IMODE_PACKED16;
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isc->try_config.dctrl_dview = ISC_DCTRL_DVIEW_PACKED;
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isc->try_config.bpp = 16;
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@@ -1011,7 +1031,8 @@ static int isc_try_configure_pipeline(st
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/* if sensor format is RAW, we convert inside ISC */
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if (ISC_IS_FORMAT_RAW(isc->try_config.sd_format->mbus_code)) {
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isc->try_config.bits_pipeline = CFA_ENABLE |
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- WB_ENABLE | GAM_ENABLES;
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+ WB_ENABLE | GAM_ENABLES | DPC_BLCENABLE |
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+ CC_ENABLE;
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} else {
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isc->try_config.bits_pipeline = 0x0;
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}
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@@ -1020,8 +1041,9 @@ static int isc_try_configure_pipeline(st
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/* if sensor format is RAW, we convert inside ISC */
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if (ISC_IS_FORMAT_RAW(isc->try_config.sd_format->mbus_code)) {
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isc->try_config.bits_pipeline = CFA_ENABLE |
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- CSC_ENABLE | WB_ENABLE | GAM_ENABLES |
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- SUB420_ENABLE | SUB422_ENABLE | CBC_ENABLE;
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+ CSC_ENABLE | GAM_ENABLES | WB_ENABLE |
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+ SUB420_ENABLE | SUB422_ENABLE | CBC_ENABLE |
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+ DPC_BLCENABLE;
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} else {
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isc->try_config.bits_pipeline = 0x0;
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}
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@@ -1031,33 +1053,39 @@ static int isc_try_configure_pipeline(st
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if (ISC_IS_FORMAT_RAW(isc->try_config.sd_format->mbus_code)) {
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isc->try_config.bits_pipeline = CFA_ENABLE |
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CSC_ENABLE | WB_ENABLE | GAM_ENABLES |
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- SUB422_ENABLE | CBC_ENABLE;
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+ SUB422_ENABLE | CBC_ENABLE | DPC_BLCENABLE;
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} else {
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isc->try_config.bits_pipeline = 0x0;
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}
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break;
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case V4L2_PIX_FMT_YUYV:
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+ case V4L2_PIX_FMT_UYVY:
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+ case V4L2_PIX_FMT_VYUY:
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/* if sensor format is RAW, we convert inside ISC */
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if (ISC_IS_FORMAT_RAW(isc->try_config.sd_format->mbus_code)) {
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isc->try_config.bits_pipeline = CFA_ENABLE |
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CSC_ENABLE | WB_ENABLE | GAM_ENABLES |
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- SUB422_ENABLE | CBC_ENABLE;
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+ SUB422_ENABLE | CBC_ENABLE | DPC_BLCENABLE;
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} else {
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isc->try_config.bits_pipeline = 0x0;
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}
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break;
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case V4L2_PIX_FMT_GREY:
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- if (ISC_IS_FORMAT_RAW(isc->try_config.sd_format->mbus_code)) {
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+ case V4L2_PIX_FMT_Y16:
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/* if sensor format is RAW, we convert inside ISC */
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+ if (ISC_IS_FORMAT_RAW(isc->try_config.sd_format->mbus_code)) {
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isc->try_config.bits_pipeline = CFA_ENABLE |
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CSC_ENABLE | WB_ENABLE | GAM_ENABLES |
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- CBC_ENABLE;
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+ CBC_ENABLE | DPC_BLCENABLE;
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} else {
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isc->try_config.bits_pipeline = 0x0;
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}
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break;
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default:
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- isc->try_config.bits_pipeline = 0x0;
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+ if (ISC_IS_FORMAT_RAW(isc->try_config.sd_format->mbus_code))
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+ isc->try_config.bits_pipeline = WB_ENABLE | DPC_BLCENABLE;
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+ else
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+ isc->try_config.bits_pipeline = 0x0;
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}
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/* Tune the pipeline to product specific */
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