111 lines
4.1 KiB
Diff
111 lines
4.1 KiB
Diff
From 7173e54070a9b530c8c16e0a507be71385133abd Mon Sep 17 00:00:00 2001
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From: Eugen Hristev <eugen.hristev@microchip.com>
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Date: Tue, 13 Apr 2021 12:57:12 +0200
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Subject: [PATCH 170/247] media: atmel: atmel-isc: add DMA to register offsets
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The DMA submodule is a part of the atmel-isc pipeline, and stands for
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Direct Memory Access. It acts like a master on the AXI bus of the SoC, and
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can directly write the RAM area with the pixel data from the ISC internal
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sram.
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Add dma to the reg offsets struct.
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This will allow different products to have a different reg offset for this
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particular module.
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Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
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Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
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Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
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---
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drivers/media/platform/atmel/atmel-isc-base.c | 19 ++++++++++++-------
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drivers/media/platform/atmel/atmel-isc-regs.h | 3 +++
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drivers/media/platform/atmel/atmel-isc.h | 2 ++
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.../media/platform/atmel/atmel-sama5d2-isc.c | 1 +
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4 files changed, 18 insertions(+), 7 deletions(-)
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--- a/drivers/media/platform/atmel/atmel-isc-base.c
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+++ b/drivers/media/platform/atmel/atmel-isc-base.c
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@@ -601,16 +601,20 @@ static void isc_start_dma(struct isc_dev
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ISC_PFE_CFG0_COLEN | ISC_PFE_CFG0_ROWEN);
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addr0 = vb2_dma_contig_plane_dma_addr(&isc->cur_frm->vb.vb2_buf, 0);
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- regmap_write(regmap, ISC_DAD0, addr0);
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+ regmap_write(regmap, ISC_DAD0 + isc->offsets.dma, addr0);
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switch (isc->config.fourcc) {
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case V4L2_PIX_FMT_YUV420:
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- regmap_write(regmap, ISC_DAD1, addr0 + (sizeimage * 2) / 3);
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- regmap_write(regmap, ISC_DAD2, addr0 + (sizeimage * 5) / 6);
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+ regmap_write(regmap, ISC_DAD1 + isc->offsets.dma,
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+ addr0 + (sizeimage * 2) / 3);
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+ regmap_write(regmap, ISC_DAD2 + isc->offsets.dma,
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+ addr0 + (sizeimage * 5) / 6);
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break;
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case V4L2_PIX_FMT_YUV422P:
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- regmap_write(regmap, ISC_DAD1, addr0 + sizeimage / 2);
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- regmap_write(regmap, ISC_DAD2, addr0 + (sizeimage * 3) / 4);
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+ regmap_write(regmap, ISC_DAD1 + isc->offsets.dma,
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+ addr0 + sizeimage / 2);
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+ regmap_write(regmap, ISC_DAD2 + isc->offsets.dma,
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+ addr0 + (sizeimage * 3) / 4);
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break;
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default:
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break;
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@@ -618,7 +622,8 @@ static void isc_start_dma(struct isc_dev
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dctrl_dview = isc->config.dctrl_dview;
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- regmap_write(regmap, ISC_DCTRL, dctrl_dview | ISC_DCTRL_IE_IS);
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+ regmap_write(regmap, ISC_DCTRL + isc->offsets.dma,
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+ dctrl_dview | ISC_DCTRL_IE_IS);
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spin_lock(&isc->awb_lock);
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regmap_write(regmap, ISC_CTRLEN, ISC_CTRL_CAPTURE);
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spin_unlock(&isc->awb_lock);
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@@ -731,7 +736,7 @@ static int isc_configure(struct isc_devi
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regmap_update_bits(regmap, ISC_RLP_CFG + isc->offsets.rlp,
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ISC_RLP_CFG_MODE_MASK, rlp_mode);
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- regmap_write(regmap, ISC_DCFG, dcfg);
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+ regmap_write(regmap, ISC_DCFG + isc->offsets.dma, dcfg);
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/* Set the pipeline */
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isc_set_pipeline(isc, pipeline);
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--- a/drivers/media/platform/atmel/atmel-isc-regs.h
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+++ b/drivers/media/platform/atmel/atmel-isc-regs.h
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@@ -247,6 +247,9 @@
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#define ISC_HIS_CFG_RAR BIT(8)
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+/* Offset for DMA register specific to sama5d2 product */
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+#define ISC_SAMA5D2_DMA_OFFSET 0
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+
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/* DMA Configuration Register */
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#define ISC_DCFG 0x000003e0
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#define ISC_DCFG_IMODE_PACKED8 0x0
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--- a/drivers/media/platform/atmel/atmel-isc.h
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+++ b/drivers/media/platform/atmel/atmel-isc.h
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@@ -151,6 +151,7 @@ struct isc_ctrls {
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* @sub420: Offset for the SUB420 register
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* @rlp: Offset for the RLP register
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* @his: Offset for the HIS related registers
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+ * @dma: Offset for the DMA related registers
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*/
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struct isc_reg_offsets {
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u32 csc;
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@@ -159,6 +160,7 @@ struct isc_reg_offsets {
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u32 sub420;
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u32 rlp;
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u32 his;
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+ u32 dma;
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};
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/*
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--- a/drivers/media/platform/atmel/atmel-sama5d2-isc.c
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+++ b/drivers/media/platform/atmel/atmel-sama5d2-isc.c
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@@ -257,6 +257,7 @@ static int atmel_isc_probe(struct platfo
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isc->offsets.sub420 = ISC_SAMA5D2_SUB420_OFFSET;
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isc->offsets.rlp = ISC_SAMA5D2_RLP_OFFSET;
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isc->offsets.his = ISC_SAMA5D2_HIS_OFFSET;
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+ isc->offsets.dma = ISC_SAMA5D2_DMA_OFFSET;
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/* sama5d2-isc - 8 bits per beat */
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isc->dcfg = ISC_DCFG_YMBSIZE_BEATS8 | ISC_DCFG_CMBSIZE_BEATS8;
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