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https://git.openwrt.org/openwrt/openwrt.git
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f07e572f64
bcm2708: boot tested on RPi B+ v1.2 bcm2709: boot tested on RPi 3B v1.2 and RPi 4B v1.1 4G bcm2710: boot tested on RPi 3B v1.2 bcm2711: boot tested on RPi 4B v1.1 4G Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
57 lines
2.1 KiB
Diff
57 lines
2.1 KiB
Diff
From c70ae3d1923339746d156bd1d723d141113183aa Mon Sep 17 00:00:00 2001
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From: Joerg Schambacher <joerg@i2audio.com>
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Date: Mon, 1 Feb 2021 16:53:46 +0100
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Subject: [PATCH] Hifiberry DAC+ADC Pro fix for the PLL when changing
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sample rates
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Adds 2 msecs delay when switching between oscillators to allow
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correct PLL settling.
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Thanks to Clive Messer for the support!
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Signed-off-by: Joerg Schambacher <joerg@hifiberry.com>
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---
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sound/soc/bcm/hifiberry_dacplusadcpro.c | 14 ++++----------
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1 file changed, 4 insertions(+), 10 deletions(-)
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--- a/sound/soc/bcm/hifiberry_dacplusadcpro.c
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+++ b/sound/soc/bcm/hifiberry_dacplusadcpro.c
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@@ -190,6 +190,7 @@ static void snd_rpi_hifiberry_dacplusadc
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PCM512x_GPIO_CONTROL_1, 0x24, 0x04);
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break;
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}
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+ usleep_range(2000, 2100);
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}
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static void snd_rpi_hifiberry_dacplusadcpro_clk_gpio(struct snd_soc_component *component)
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@@ -207,13 +208,6 @@ static bool snd_rpi_hifiberry_dacplusadc
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return (!(sck & 0x40));
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}
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-static bool snd_rpi_hifiberry_dacplusadcpro_is_sclk_sleep(
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- struct snd_soc_component *component)
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-{
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- msleep(2);
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- return snd_rpi_hifiberry_dacplusadcpro_is_sclk(component);
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-}
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-
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static bool snd_rpi_hifiberry_dacplusadcpro_is_pro_card(struct snd_soc_component *component)
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{
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bool isClk44EN, isClk48En, isNoClk;
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@@ -221,13 +215,13 @@ static bool snd_rpi_hifiberry_dacplusadc
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snd_rpi_hifiberry_dacplusadcpro_clk_gpio(component);
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snd_rpi_hifiberry_dacplusadcpro_select_clk(component, HIFIBERRY_DACPRO_CLK44EN);
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- isClk44EN = snd_rpi_hifiberry_dacplusadcpro_is_sclk_sleep(component);
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+ isClk44EN = snd_rpi_hifiberry_dacplusadcpro_is_sclk(component);
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snd_rpi_hifiberry_dacplusadcpro_select_clk(component, HIFIBERRY_DACPRO_NOCLOCK);
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- isNoClk = snd_rpi_hifiberry_dacplusadcpro_is_sclk_sleep(component);
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+ isNoClk = snd_rpi_hifiberry_dacplusadcpro_is_sclk(component);
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snd_rpi_hifiberry_dacplusadcpro_select_clk(component, HIFIBERRY_DACPRO_CLK48EN);
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- isClk48En = snd_rpi_hifiberry_dacplusadcpro_is_sclk_sleep(component);
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+ isClk48En = snd_rpi_hifiberry_dacplusadcpro_is_sclk(component);
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return (isClk44EN && isClk48En && !isNoClk);
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}
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