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https://git.openwrt.org/openwrt/openwrt.git
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f07e572f64
bcm2708: boot tested on RPi B+ v1.2 bcm2709: boot tested on RPi 3B v1.2 and RPi 4B v1.1 4G bcm2710: boot tested on RPi 3B v1.2 bcm2711: boot tested on RPi 4B v1.1 4G Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
37 lines
1.1 KiB
Diff
37 lines
1.1 KiB
Diff
From ac315f66be96c5a423382efb559f193e5b786226 Mon Sep 17 00:00:00 2001
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From: Dave Stevenson <dave.stevenson@raspberrypi.com>
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Date: Wed, 21 Oct 2020 18:33:02 +0100
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Subject: [PATCH] dtoverlays: Correct CSI2 settings for ov9281
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OV9281 appears to drop the clock to LP mode between frames, but
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the overlay didn't define this at both ends of the CSI2 link.
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The overlay also had an incorrect link frequency defined, not that
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the driver ever checked for one.
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Fix both issues.
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Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
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---
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arch/arm/boot/dts/overlays/ov9281-overlay.dts | 3 ++-
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1 file changed, 2 insertions(+), 1 deletion(-)
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--- a/arch/arm/boot/dts/overlays/ov9281-overlay.dts
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+++ b/arch/arm/boot/dts/overlays/ov9281-overlay.dts
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@@ -34,7 +34,7 @@
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data-lanes = <1 2>;
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clock-noncontinuous;
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link-frequencies =
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- /bits/ 64 <456000000>;
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+ /bits/ 64 <400000000>;
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};
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};
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};
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@@ -50,6 +50,7 @@
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csi1_ep: endpoint {
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remote-endpoint = <&ov9281_0>;
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data-lanes = <1 2>;
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+ clock-noncontinuous;
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};
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};
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};
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