162 lines
4.9 KiB
Diff
162 lines
4.9 KiB
Diff
From 55cfeb396965c3906a84d09a9c487d065e37773b Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
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Date: Thu, 18 Mar 2021 09:01:42 +0100
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Subject: [PATCH 1/2] net: dsa: bcm_sf2: add function finding RGMII register
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Simple macro like REG_RGMII_CNTRL_P() is insufficient as:
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1. It doesn't validate port argument
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2. It doesn't support chipsets with non-lineral RGMII regs layout
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Missing port validation could result in getting register offset from out
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of array. Random memory -> random offset -> random reads/writes. It
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affected e.g. BCM4908 for REG_RGMII_CNTRL_P(7).
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Fixes: a78e86ed586d ("net: dsa: bcm_sf2: Prepare for different register layouts")
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Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
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Acked-by: Florian Fainelli <f.fainelli@gmail.com>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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---
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drivers/net/dsa/bcm_sf2.c | 49 +++++++++++++++++++++++++++++-----
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drivers/net/dsa/bcm_sf2_regs.h | 2 --
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2 files changed, 42 insertions(+), 9 deletions(-)
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--- a/drivers/net/dsa/bcm_sf2.c
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+++ b/drivers/net/dsa/bcm_sf2.c
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@@ -75,6 +75,31 @@ static void bcm_sf2_recalc_clock(struct
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clk_set_rate(priv->clk_mdiv, new_rate);
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}
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+static u16 bcm_sf2_reg_rgmii_cntrl(struct bcm_sf2_priv *priv, int port)
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+{
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+ switch (priv->type) {
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+ case BCM4908_DEVICE_ID:
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+ /* TODO */
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+ break;
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+ default:
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+ switch (port) {
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+ case 0:
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+ return REG_RGMII_0_CNTRL;
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+ case 1:
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+ return REG_RGMII_1_CNTRL;
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+ case 2:
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+ return REG_RGMII_2_CNTRL;
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+ default:
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+ break;
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+ }
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+ }
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+
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+ WARN_ONCE(1, "Unsupported port %d\n", port);
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+
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+ /* RO fallback reg */
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+ return REG_SWITCH_STATUS;
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+}
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+
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static void bcm_sf2_imp_setup(struct dsa_switch *ds, int port)
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{
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struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);
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@@ -696,6 +721,7 @@ static void bcm_sf2_sw_mac_config(struct
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{
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struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);
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u32 id_mode_dis = 0, port_mode;
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+ u32 reg_rgmii_ctrl;
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u32 reg;
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if (port == core_readl(priv, CORE_IMP0_PRT_ID))
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@@ -719,10 +745,12 @@ static void bcm_sf2_sw_mac_config(struct
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return;
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}
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+ reg_rgmii_ctrl = bcm_sf2_reg_rgmii_cntrl(priv, port);
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+
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/* Clear id_mode_dis bit, and the existing port mode, let
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* RGMII_MODE_EN bet set by mac_link_{up,down}
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*/
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- reg = reg_readl(priv, REG_RGMII_CNTRL_P(port));
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+ reg = reg_readl(priv, reg_rgmii_ctrl);
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reg &= ~ID_MODE_DIS;
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reg &= ~(PORT_MODE_MASK << PORT_MODE_SHIFT);
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@@ -730,13 +758,14 @@ static void bcm_sf2_sw_mac_config(struct
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if (id_mode_dis)
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reg |= ID_MODE_DIS;
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- reg_writel(priv, reg, REG_RGMII_CNTRL_P(port));
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+ reg_writel(priv, reg, reg_rgmii_ctrl);
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}
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static void bcm_sf2_sw_mac_link_set(struct dsa_switch *ds, int port,
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phy_interface_t interface, bool link)
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{
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struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);
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+ u32 reg_rgmii_ctrl;
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u32 reg;
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if (!phy_interface_mode_is_rgmii(interface) &&
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@@ -744,13 +773,15 @@ static void bcm_sf2_sw_mac_link_set(stru
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interface != PHY_INTERFACE_MODE_REVMII)
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return;
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+ reg_rgmii_ctrl = bcm_sf2_reg_rgmii_cntrl(priv, port);
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+
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/* If the link is down, just disable the interface to conserve power */
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- reg = reg_readl(priv, REG_RGMII_CNTRL_P(port));
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+ reg = reg_readl(priv, reg_rgmii_ctrl);
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if (link)
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reg |= RGMII_MODE_EN;
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else
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reg &= ~RGMII_MODE_EN;
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- reg_writel(priv, reg, REG_RGMII_CNTRL_P(port));
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+ reg_writel(priv, reg, reg_rgmii_ctrl);
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}
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static void bcm_sf2_sw_mac_link_down(struct dsa_switch *ds, int port,
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@@ -787,11 +818,15 @@ static void bcm_sf2_sw_mac_link_up(struc
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{
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struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);
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struct ethtool_eee *p = &priv->dev->ports[port].eee;
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- u32 reg, offset;
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bcm_sf2_sw_mac_link_set(ds, port, interface, true);
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if (port != core_readl(priv, CORE_IMP0_PRT_ID)) {
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+ u32 reg_rgmii_ctrl;
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+ u32 reg, offset;
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+
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+ reg_rgmii_ctrl = bcm_sf2_reg_rgmii_cntrl(priv, port);
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+
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if (priv->type == BCM4908_DEVICE_ID ||
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priv->type == BCM7445_DEVICE_ID)
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offset = CORE_STS_OVERRIDE_GMIIP_PORT(port);
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@@ -802,7 +837,7 @@ static void bcm_sf2_sw_mac_link_up(struc
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interface == PHY_INTERFACE_MODE_RGMII_TXID ||
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interface == PHY_INTERFACE_MODE_MII ||
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interface == PHY_INTERFACE_MODE_REVMII) {
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- reg = reg_readl(priv, REG_RGMII_CNTRL_P(port));
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+ reg = reg_readl(priv, reg_rgmii_ctrl);
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reg &= ~(RX_PAUSE_EN | TX_PAUSE_EN);
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if (tx_pause)
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@@ -810,7 +845,7 @@ static void bcm_sf2_sw_mac_link_up(struc
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if (rx_pause)
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reg |= RX_PAUSE_EN;
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- reg_writel(priv, reg, REG_RGMII_CNTRL_P(port));
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+ reg_writel(priv, reg, reg_rgmii_ctrl);
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}
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reg = SW_OVERRIDE | LINK_STS;
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--- a/drivers/net/dsa/bcm_sf2_regs.h
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+++ b/drivers/net/dsa/bcm_sf2_regs.h
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@@ -55,8 +55,6 @@ enum bcm_sf2_reg_offs {
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#define CROSSBAR_BCM4908_EXT_GPHY4 1
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#define CROSSBAR_BCM4908_EXT_RGMII 2
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-#define REG_RGMII_CNTRL_P(x) (REG_RGMII_0_CNTRL + (x))
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-
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/* Relative to REG_RGMII_CNTRL */
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#define RGMII_MODE_EN (1 << 0)
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#define ID_MODE_DIS (1 << 1)
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