#include "mt7620a.dtsi" #include #include / { compatible = "lava,lr-25g001", "ralink,mt7620a-soc"; model = "LAVA LR-25G001"; aliases { led-boot = &led_status; led-failsafe = &led_status; led-running = &led_status; led-upgrade = &led_status; }; keys { compatible = "gpio-keys"; wps { label = "wps"; gpios = <&gpio0 2 GPIO_ACTIVE_LOW>; linux,code = ; }; reset { label = "reset"; gpios = <&gpio0 1 GPIO_ACTIVE_LOW>; linux,code = ; }; }; leds { compatible = "gpio-leds"; led_status: status { label = "green:status"; gpios = <&gpio0 14 GPIO_ACTIVE_LOW>; }; wifi2g { label = "green:wifi2g"; gpios = <&gpio0 11 GPIO_ACTIVE_LOW>; linux,default-trigger = "phy1tpt"; }; wifi5g { label = "green:wifi5g"; gpios = <&gpio0 13 GPIO_ACTIVE_LOW>; linux,default-trigger = "phy0tpt"; }; }; gpio_export { compatible = "gpio-export"; #size-cells = <0>; usbpower { gpio-export,name = "usbpower"; gpio-export,output = <1>; gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; }; }; }; &spi0 { status = "okay"; flash@0 { compatible = "jedec,spi-nor"; reg = <0>; spi-max-frequency = <10000000>; partitions { compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; partition@0 { label = "jboot"; reg = <0x0 0x10000>; read-only; }; partition@10000 { compatible = "amit,jimage"; label = "firmware"; reg = <0x10000 0xfe0000>; }; config: partition@ff0000 { label = "config"; reg = <0xff0000 0x10000>; read-only; }; }; }; }; &ehci { status = "okay"; }; &ohci { status = "okay"; }; ðernet { pinctrl-names = "default"; pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>; port@5 { status = "okay"; phy-mode = "rgmii"; mediatek,fixed-link = <1000 1 1 1>; }; mdio-bus { status = "okay"; ethernet-phy@0 { reg = <0>; phy-mode = "rgmii"; qca,ar8327-initvals = < 0x04 0x87300000 /* PORT0 PAD MODE CTRL */ 0x0c 0x00000000 /* PORT6 PAD MODE CTRL */ 0x7c 0x0000007e /* PORT0_STATUS */ 0x80 0x00001200 /* PORT1_STATUS */ 0x84 0x00001200 /* PORT2_STATUS */ 0x88 0x00001200 /* PORT3_STATUS */ 0x8c 0x00001200 /* PORT4_STATUS */ 0x90 0x00001200 /* PORT5_STATUS */ 0x94 0x00000000 /* PORT6_STATUS */ >; }; }; }; &gsw { mediatek,ephy-base = /bits/ 8 <8>; }; &pcie { status = "okay"; }; &pcie0 { mt76x0e@0,0 { reg = <0x0000 0 0 0 0>; nvmem-cells = <&macaddr_config_e07e>; nvmem-cell-names = "mac-address"; mac-address-increment = <(2)>; mediatek,mtd-eeprom = <&config 0xe08a>; }; }; &state_default { gpio { groups = "uartf", "i2c"; function = "gpio"; }; }; &config { compatible = "nvmem-cells"; #address-cells = <1>; #size-cells = <1>; macaddr_config_e07e: macaddr@e07e { reg = <0xe07e 0x6>; }; };